/external/llvm/test/MC/AArch64/ |
alias-logicalimm.s | 16 bics x0, x1, #2 21 bics w0, w1, #2
|
arm64-logical-encoding.s | 116 bics w1, w2, w3 117 bics x1, x2, x3 118 bics w1, w2, w3, lsl #3 119 bics x1, x2, x3, lsl #3 120 bics w1, w2, w3, lsr #3 121 bics x1, x2, x3, lsr #3 122 bics w1, w2, w3, asr #3 123 bics x1, x2, x3, asr #3 124 bics w1, w2, w3, ror #3 125 bics x1, x2, x3, ror # [all...] |
/bionic/libc/arch-arm/generic/bionic/ |
strcpy.S | 56 bics r2, r2, r3 70 bics r2, r2, r3 75 bics r2, r2, r4
|
strcmp.S | 205 bics r3, r3, #0xff000000
|
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
tcompat2.d | 21 0+14 <[^>]*> 4388 * bics r0, r1
|
armv1.s | 23 bics r0, r0, r0
|
armv1.d | 30 0+4c <[^>]*> e1d00000 ? bics r0, r0, r0
|
thumb-eabi.d | 40 0+03c <[^>]+> 43bd bics r5, r7
|
thumb.d | 41 0+03c <[^>]+> 43bd bics r5, r7
|
thumb32.d | 143 0[0-9a-f]+ <[^>]+> 4380 bics r0, r0 144 0[0-9a-f]+ <[^>]+> 4385 bics r5, r0 145 0[0-9a-f]+ <[^>]+> 43a8 bics r0, r5 146 0[0-9a-f]+ <[^>]+> 43a8 bics r0, r5 147 0[0-9a-f]+ <[^>]+> ea35 0000 bics\.w r0, r5, r0 153 0[0-9a-f]+ <[^>]+> ea30 0000 bics\.w r0, r0, r0 [all...] |
thumb32.s | 151 arit3 bic bics bic.w bics.w
|
/bionic/libc/arch-arm64/generic/bionic/ |
strlen.S | 78 bics has_nul2, tmp3, tmp4
|
string_copy.S | 237 bics has_nul1, tmp1, tmp2
|
strncmp.S | 92 bics has_nul, tmp1, tmp2 /* Non-zero if NUL terminator. */
|
/external/llvm/test/MC/ARM/ |
arm_instructions.s | 52 @ CHECK: bics r1, r2, r3 @ encoding: [0x03,0x10,0xd2,0xe1] 53 bics r1,r2,r3
|
thumb_rewrites.s | 98 bics r0, r0, r1 99 @ CHECK: bics r0, r1 @ encoding: [0x88,0x43]
|
basic-thumb-instructions.s | 160 @ BICS 162 bics r1, r6 164 @ CHECK: bics r1, r6 @ encoding: [0xb1,0x43]
|
/external/valgrind/none/tests/arm64/ |
integer.stdout.exp | [all...] |
/external/valgrind/none/tests/arm/ |
v6intThumb.stdout.exp | 256 BICS-16 0x10E 257 bics r1, r2 :: rd 0x10414807 rm 0x27181728, c:v-in 0, cpsr 0x00000000 258 bics r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 0, cpsr 0x40000000 Z 259 bics r1, r2 :: rd 0x00000001 rm 0x00000000, c:v-in 0, cpsr 0x00000000 260 bics r1, r2 :: rd 0x00000000 rm 0x00000001, c:v-in 0, cpsr 0x40000000 Z 261 bics r1, r2 :: rd 0x80000000 rm 0x00000000, c:v-in 0, cpsr 0x80000000 N 262 bics r1, r2 :: rd 0x00000000 rm 0x80000000, c:v-in 0, cpsr 0x40000000 Z 263 bics r1, r2 :: rd 0x00000000 rm 0x80000000, c:v-in 0, cpsr 0x40000000 Z 264 bics r1, r2 :: rd 0x10414807 rm 0x27181728, c:v-in 1, cpsr 0x10000000 V 265 bics r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 1, cpsr 0x50000000 Z [all...] |
/bionic/libc/arch-arm/cortex-a9/bionic/ |
strcmp.S | 423 bics r3, r3, #0xff000000
|
/external/v8/test/cctest/ |
test-disasm-arm64.cc | 678 COMPARE(bics(w27, w28, Operand(0xfffffff7)), "ands w27, w28, #0x8"); 679 COMPARE(bics(fp, x0, Operand(0xfffffffeffffffffL)), [all...] |
/art/compiler/utils/arm/ |
assembler_arm32_test.cc | 751 TEST_F(AssemblerArm32Test, Bics) { 752 T4Helper(&arm::Arm32Assembler::bics, true, "bic{cond}s {reg1}, {reg2}, {shift}", "bics");
|
assembler_arm.h | 534 virtual void bics(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) { function in class:art::arm::ArmAssembler [all...] |
/art/compiler/utils/ |
assembler_thumb_test.cc | 264 __ bics(R0, R0, ShifterOperand(R1)); 296 __ bics(R0, R0, ShifterOperand(R8)); 320 __ bics(R0, R0, ShifterOperand(R1), arm::EQ); [all...] |
/external/vixl/test/ |
test-disasm-a64.cc | 776 COMPARE(bics(w27, w28, Operand(0xfffffff7)), "ands w27, w28, #0x8"); 777 COMPARE(bics(x29, x0, Operand(0xfffffffeffffffff)), [all...] |