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  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i860/
dir-intel03-err.s 2 # The .dual, .enddual, and .atmp directives are valid only
10 .dual
dir-intel01.s 2 // Test that the .dual and .enddual directives are recognized and
3 // function (i.e., that the dual bits are set properly).
9 .dual
float04.s 14 # Non-pipelined, without dual bit
21 # Pipelined, without dual bit
28 # Non-pipelined, with dual bit
39 # Pipelined, with dual bit
float02.s 5 # Without dual bit
19 # With dual bit
float03.s 5 # Non-pipelined, without dual bit
12 # Pipelined, without dual bit
28 # Non-pipelined, with dual bit
39 # Pipelined, with dual bit
form.s 5 # pform, no dual bit
16 # form, no dual bit
27 # pform, with dual bit
47 # form, with dual bit
float01.s 5 # Non-pipelined, without dual bit
20 # Pipelined, without dual bit
35 # Non-pipelined, with dual bit
60 # Pipelined, with dual bit
simd.s 5 # Pipelined, without dual bit
26 # Non-pipelined, without dual bit
47 # Pipelined, with dual bit
84 # Non-pipelined, with dual bit
  /frameworks/base/core/tests/hosttests/test-apps/SharedUid/dual/src/com/framework/shareduid/dual/
MainActivity.java 17 package com.framework.shareduid.dual;
  /ndk/sources/cxx-stl/llvm-libc++/test/
Android.mk 1 # This file is dual licensed under the MIT and the University of Illinois Open
  /external/v8/tools/
cpu.sh 29 echo "Switching to dual-core mode"
61 dualcore | dual)
  /frameworks/base/core/tests/hosttests/test-apps/SharedUid/dual/
Android.mk 37 LOCAL_MANIFEST_FILE := dual/AndroidManifest.xml
  /external/boringssl/linux-arm/crypto/sha/
sha256-armv4.S 5 @ project. The module is, however, dual licensed under OpenSSL and
20 @ Rescheduling for dual-issue pipeline resulted in 22% improvement on
    [all...]
sha512-armv4.S 5 @ project. The module is, however, dual licensed under OpenSSL and
20 @ Rescheduling for dual-issue pipeline resulted in 6% improvement on
38 @ multiple NEON instructions per cycle, but dual NEON issue could
    [all...]
  /external/libvpx/libvpx/vpx_dsp/arm/
variance_media.asm 63 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
68 smlad r11, r10, r10, r11 ; dual signed multiply, add and accumulate (2)
87 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
92 smlad r11, r10, r10, r11 ; dual signed multiply, add and accumulate (2)
111 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
116 smlad r11, r10, r10, r11 ; dual signed multiply, add and accumulate (2)
137 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
138 smlad r11, r10, r10, r11 ; dual signed multiply, add and accumulate (2)
196 smlad r5, r7, r7, r5 ; dual signed multiply, add and accumulate (1)
201 smlad r5, r10, r10, r5 ; dual signed multiply, add and accumulate (2
    [all...]
variance_halfpixvar16x16_h_media.asm 66 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
78 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
97 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
109 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
128 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
140 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
161 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
162 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
variance_halfpixvar16x16_v_media.asm 67 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
79 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
98 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
110 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
129 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
141 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
162 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
163 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
variance_halfpixvar16x16_hv_media.asm 77 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
84 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
119 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
126 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
161 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
167 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
203 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
205 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/armv6/
vp8_variance16x16_armv6.asm 61 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
66 smlad r11, r10, r10, r11 ; dual signed multiply, add and accumulate (2)
85 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
90 smlad r11, r10, r10, r11 ; dual signed multiply, add and accumulate (2)
109 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
114 smlad r11, r10, r10, r11 ; dual signed multiply, add and accumulate (2)
135 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
136 smlad r11, r10, r10, r11 ; dual signed multiply, add and accumulate (2)
vp8_variance_halfpixvar16x16_h_armv6.asm 66 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
78 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
97 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
109 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
128 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
140 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
161 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
162 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
vp8_variance_halfpixvar16x16_v_armv6.asm 67 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
79 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
98 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
110 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
129 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
141 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
162 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
163 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
vp8_variance8x8_armv6.asm 59 smlad r5, r7, r7, r5 ; dual signed multiply, add and accumulate (1)
64 smlad r5, r10, r10, r5 ; dual signed multiply, add and accumulate (2)
85 smlad r5, r7, r7, r5 ; dual signed multiply, add and accumulate (1)
87 smlad r5, r10, r10, r5 ; dual signed multiply, add and accumulate (2)
vp8_variance_halfpixvar16x16_hv_armv6.asm 77 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
84 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
119 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
126 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
161 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
167 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
203 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
205 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/arm/armv6/
vp8_mse16x16_armv6.asm 61 smlad r4, r6, r6, r4 ; dual signed multiply, add and accumulate (1)
65 smlad r4, r7, r7, r4 ; dual signed multiply, add and accumulate (2)
80 smlad r4, r6, r6, r4 ; dual signed multiply, add and accumulate (1)
84 smlad r4, r7, r7, r4 ; dual signed multiply, add and accumulate (2)
101 smlad r4, r6, r6, r4 ; dual signed multiply, add and accumulate (1)
105 smlad r4, r7, r7, r4 ; dual signed multiply, add and accumulate (2)
124 smlad r4, r6, r6, r4 ; dual signed multiply, add and accumulate (1)
125 smlad r4, r7, r7, r4 ; dual signed multiply, add and accumulate (2)
  /external/autotest/server/cros/servo/
pd_console.py 179 ['dual-role toggling:\s+([\w ]+)'])
202 dual = self.get_pd_dualrole()
204 if dual != self.dualrole_resp[dual_index]:
206 self.dualrole_resp[dual_index] + " != "+dual)

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