| /external/vixl/src/vixl/a64/ |
| instructions-a64.cc | 339 ptrdiff_t imm21; local
341 imm21 = target - this;
346 imm21 = target_page - this_page;
348 Instr imm = Assembler::ImmPCRelAddress(static_cast<int32_t>(imm21));
|
| assembler-a64.h | [all...] |
| assembler-a64.cc | 871 void Assembler::adr(const Register& rd, int imm21) {
873 Emit(ADR | ImmPCRelAddress(imm21) | Rd(rd));
882 void Assembler::adrp(const Register& rd, int imm21) {
884 Emit(ADRP | ImmPCRelAddress(imm21) | Rd(rd));
[all...] |
| /external/v8/src/mips/ |
| disasm-mips.cc | 347 int32_t imm21 = instr->Imm21Value(); local
349 imm21 <<= (32 - kImm21Bits);
350 imm21 >>= (32 - kImm21Bits);
351 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", imm21);
359 int32_t imm21 = instr->Imm21Value(); local
361 imm21 <<= (32 - kImm21Bits);
362 imm21 >>= (32 - kImm21Bits);
366 delta_pc + (imm21 << n_bits)));
618 DCHECK(STRING_STARTS_WITH(format, "imm21"));
1609 int32_t imm21 = instr->Imm21Value(); local
[all...] |
| assembler-mips.cc | 1852 uint32_t imm21 = ADDIUPC << kImm19Bits | (imm19 & kImm19Mask); local
1860 uint32_t imm21 = LWPC << kImm19Bits | (offset19 & kImm19Mask); local
1868 uint32_t imm21 = AUIPC << kImm16Bits | (imm16 & kImm16Mask); local
1876 uint32_t imm21 = ALUIPC << kImm16Bits | (imm16 & kImm16Mask); local
[all...] |
| simulator-mips.cc | 4287 int32_t imm21 = instr->Imm21Value(); local
[all...] |
| /external/v8/src/mips64/ |
| disasm-mips64.cc | 350 int32_t imm21 = instr->Imm21Value(); local
352 imm21 <<= (32 - kImm21Bits);
353 imm21 >>= (32 - kImm21Bits);
354 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", imm21);
362 int32_t imm21 = instr->Imm21Value(); local
364 imm21 <<= (32 - kImm21Bits);
365 imm21 >>= (32 - kImm21Bits);
369 delta_pc + (imm21 << n_bits)));
633 DCHECK(STRING_STARTS_WITH(format, "imm21"));
1847 int32_t imm21 = instr->Imm21Value(); local
[all...] |
| assembler-mips64.cc | 2121 uint32_t imm21 = ADDIUPC << kImm19Bits | (imm19 & kImm19Mask); local
2129 uint32_t imm21 = LWPC << kImm19Bits | (offset19 & kImm19Mask); local
2137 uint32_t imm21 = LWUPC << kImm19Bits | (offset19 & kImm19Mask); local
2145 uint32_t imm21 = LDPC << kImm18Bits | (offset18 & kImm18Mask); local
2153 uint32_t imm21 = AUIPC << kImm16Bits | (imm16 & kImm16Mask); local
2161 uint32_t imm21 = ALUIPC << kImm16Bits | (imm16 & kImm16Mask); local
[all...] |
| simulator-mips64.cc | 4526 int32_t imm21 = instr->Imm21Value(); local
[all...] |
| /art/compiler/utils/mips/ |
| assembler_mips.h | 240 void Beqzc(Register rs, uint32_t imm21); // R6
241 void Bnezc(Register rs, uint32_t imm21); // R6
765 void EmitI21(int opcode, Register rs, uint32_t imm21);
[all...] |
| assembler_mips.cc | 148 void MipsAssembler::EmitI21(int opcode, Register rs, uint32_t imm21) {
150 CHECK(IsUint<21>(imm21)) << imm21;
153 imm21;
704 void MipsAssembler::Beqzc(Register rs, uint32_t imm21) {
707 EmitI21(0x36, rs, imm21);
710 void MipsAssembler::Bnezc(Register rs, uint32_t imm21) {
713 EmitI21(0x3E, rs, imm21);
[all...] |
| /art/compiler/utils/mips64/ |
| assembler_mips64.h | 231 void Beqzc(GpuRegister rs, uint32_t imm21);
232 void Bnezc(GpuRegister rs, uint32_t imm21);
679 void EmitI21(int opcode, GpuRegister rs, uint32_t imm21);
|
| assembler_mips64.cc | 141 void Mips64Assembler::EmitI21(int opcode, GpuRegister rs, uint32_t imm21) {
143 CHECK(IsUint<21>(imm21)) << imm21;
146 imm21;
616 void Mips64Assembler::Beqzc(GpuRegister rs, uint32_t imm21) {
618 EmitI21(0x36, rs, imm21);
621 void Mips64Assembler::Bnezc(GpuRegister rs, uint32_t imm21) {
623 EmitI21(0x3E, rs, imm21);
[all...] |
| /external/v8/src/arm64/ |
| assembler-arm64-inl.h | 999 Instr Assembler::ImmPCRelAddress(int imm21) {
1000 CHECK(is_int21(imm21));
1001 Instr imm = static_cast<Instr>(truncate_to_int21(imm21));
[all...] |
| assembler-arm64.h | [all...] |
| assembler-arm64.cc | [all...] |
| /toolchain/binutils/binutils-2.25/gold/ |
| aarch64.cc | 133 // Encode imm21 into adr. Signed imm21 is in the range of [-1M, 1M).
135 aarch64_adr_encode_imm(Insntype adr, int imm21)
138 gold_assert(-(1 << 20) <= imm21 && imm21 < (1 << 20));
142 adr |= ((imm21 & mask2) << 29) | (((imm21 >> 2) & mask19) << 5);
[all...] |
| /external/vixl/test/ |
| test-assembler-a64.cc | [all...] |
