HomeSort by relevance Sort by last modified time
    Searched refs:prefetch (Results 1 - 25 of 82) sorted by null

1 2 3 4

  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/sparc/
prefetch.s 2 prefetch [%g1],0
3 prefetch [%g1],31
4 prefetch [%g1],#n_reads
5 prefetch [%g1],#one_read
6 prefetch [%g1],#n_writes
7 prefetch [%g1],#one_write
prefetch.d 3 #name: sparc64 prefetch
10 0: c1 68 40 00 prefetch \[ %g1 \], #n_reads
11 4: ff 68 40 00 prefetch \[ %g1 \], 31
12 8: c1 68 40 00 prefetch \[ %g1 \], #n_reads
13 c: c3 68 40 00 prefetch \[ %g1 \], #one_read
14 10: c5 68 40 00 prefetch \[ %g1 \], #n_writes
15 14: c7 68 40 00 prefetch \[ %g1 \], #one_write
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/bfin/
cache.s 2 .global prefetch
3 prefetch: label
4 prefetch[p5];
5 PreFetch [fp++];
6 PREFETCH [SP];
cache.d 6 00000000 <prefetch>:
7 0: 45 02 PREFETCH\[P5\];
8 2: 67 02 PREFETCH\[FP\+\+\];
9 4: 46 02 PREFETCH\[SP\];
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
prefetch-intel.d 2 #name: i386 prefetch (Intel disassembly)
3 #source: prefetch.s
10 \s*[a-f0-9]+: 0f 0d 00 prefetch BYTE PTR \[eax\]
13 \s*[a-f0-9]+: 0f 0d 18 prefetch BYTE PTR \[eax\]
14 \s*[a-f0-9]+: 0f 0d 20 prefetch BYTE PTR \[eax\]
15 \s*[a-f0-9]+: 0f 0d 28 prefetch BYTE PTR \[eax\]
16 \s*[a-f0-9]+: 0f 0d 30 prefetch BYTE PTR \[eax\]
17 \s*[a-f0-9]+: 0f 0d 38 prefetch BYTE PTR \[eax\]
x86-64-prefetch-intel.d 2 #name: x86-64 prefetch (Intel disassembly)
3 #source: prefetch.s
10 \s*[a-f0-9]+: 0f 0d 00 prefetch BYTE PTR \[rax\]
13 \s*[a-f0-9]+: 0f 0d 18 prefetch BYTE PTR \[rax\]
14 \s*[a-f0-9]+: 0f 0d 20 prefetch BYTE PTR \[rax\]
15 \s*[a-f0-9]+: 0f 0d 28 prefetch BYTE PTR \[rax\]
16 \s*[a-f0-9]+: 0f 0d 30 prefetch BYTE PTR \[rax\]
17 \s*[a-f0-9]+: 0f 0d 38 prefetch BYTE PTR \[rax\]
x86-64-prefetch.d 2 #name: x86-64 prefetch
3 #source: prefetch.s
10 \s*[a-f0-9]+: 0f 0d 00 prefetch \(%rax\)
13 \s*[a-f0-9]+: 0f 0d 18 prefetch \(%rax\)
14 \s*[a-f0-9]+: 0f 0d 20 prefetch \(%rax\)
15 \s*[a-f0-9]+: 0f 0d 28 prefetch \(%rax\)
16 \s*[a-f0-9]+: 0f 0d 30 prefetch \(%rax\)
17 \s*[a-f0-9]+: 0f 0d 38 prefetch \(%rax\)
prefetch.d 2 #name: i386 prefetch
9 \s*[a-f0-9]+: 0f 0d 00 prefetch \(%eax\)
12 \s*[a-f0-9]+: 0f 0d 18 prefetch \(%eax\)
13 \s*[a-f0-9]+: 0f 0d 20 prefetch \(%eax\)
14 \s*[a-f0-9]+: 0f 0d 28 prefetch \(%eax\)
15 \s*[a-f0-9]+: 0f 0d 30 prefetch \(%eax\)
16 \s*[a-f0-9]+: 0f 0d 38 prefetch \(%eax\)
amd.s 5 prefetch (%ebx)
  /external/clang/test/CodeGen/
pr9614.c 17 prefetch(void) { function
29 prefetch();
37 // CHECK: call void @llvm.prefetch(
45 // CHECK: declare void @llvm.prefetch(
builtins-arm64.c 38 void prefetch() { function
40 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 1, i32 1, i32 1)
43 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 0, i32 1)
46 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 0, i32 1)
49 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 3, i32 0)
builtins-arm.c 76 void prefetch(int i) { function
78 // CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 0, i32 3, i32 1)
81 // CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 1, i32 3, i32 1)
85 // CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 1, i32 3, i32 0)
  /external/iptables/libiptc/
linux_list.h 30 #define prefetch(x) 1 macro
339 for (pos = (head)->next, prefetch(pos->next); pos != (head); \
340 pos = pos->next, prefetch(pos->next))
361 for (pos = (head)->prev, prefetch(pos->prev); pos != (head); \
362 pos = pos->prev, prefetch(pos->prev))
382 prefetch(pos->member.next); \
385 prefetch(pos->member.next))
395 prefetch(pos->member.prev); \
398 prefetch(pos->member.prev))
419 prefetch(pos->member.next);
    [all...]
  /packages/apps/TV/src/com/android/tv/menu/
ChannelsRow.java 42 mChannelsPosterPrefetcher.prefetch();
48 mChannelsPosterPrefetcher.prefetch();
74 mChannelsPosterPrefetcher.prefetch();
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
micromips@mips64-cp2.s 10 # These tests use cp2 to avoid other (cp0, fpu, prefetch) opcodes.
mips64-cp2.s 10 # these tests use cp2 to avoid other (cp0, fpu, prefetch) opcodes.
micromips@mips32-cp2.s 9 # These tests use cp2 to avoid other (cp0, fpu, prefetch) opcodes.
mips32-cp2.s 9 # these tests use cp2 to avoid other (cp0, fpu, prefetch) opcodes.
  /external/mesa3d/src/mesa/x86-64/
xform4.S 72 prefetch 16(%rdx)
96 prefetch 16(%rdx)
153 prefetch 16(%rdx)
182 prefetch 16(%rdx)
213 prefetch 64(%rsi)
245 prefetch (%rdx)
282 prefetch 32(%rdx)
314 prefetch (%rdx)
324 prefetchw 32(%rdi) /* prefetch 2 vertices ahead */
350 prefetch 32(%rdx) /* hopefully stride is zero *
    [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/tilepro/
t_insns.s 354 { add r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 }
376 { add r15, r16, r17 ; mulhha_ss r5, r6, r7 ; prefetch r25 }
378 { add r15, r16, r17 ; mulll_ss r5, r6, r7 ; prefetch r25 }
385 { add r15, r16, r17 ; prefetch r25 ; mulhha_uu r5, r6, r7 }
386 { add r15, r16, r17 ; prefetch r25 ; seqi r5, r6, 5 }
387 { add r15, r16, r17 ; prefetch r25 }
397 { add r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 }
401 { add r15, r16, r17 ; slte_u r5, r6, r7 ; prefetch r25 }
403 { add r15, r16, r17 ; sne r5, r6, r7 ; prefetch r25 }
427 { add r5, r6, r7 ; move r15, r16 ; prefetch r25
    [all...]
t_insns.d 329 9f8: [0-9a-f]* { add r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 }
351 aa8: [0-9a-f]* { mulhha_ss r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 }
353 ab8: [0-9a-f]* { mulll_ss r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 }
360 af0: [0-9a-f]* { mulhha_uu r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 }
361 af8: [0-9a-f]* { add r15, r16, r17 ; seqi r5, r6, 5 ; prefetch r25 }
362 b00: [0-9a-f]* { add r15, r16, r17 ; prefetch r25 }
372 b50: [0-9a-f]* { add r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 }
376 b70: [0-9a-f]* { add r15, r16, r17 ; slte_u r5, r6, r7 ; prefetch r25 }
378 b80: [0-9a-f]* { add r15, r16, r17 ; sne r5, r6, r7 ; prefetch r25 }
402 c40: [0-9a-f]* { add r5, r6, r7 ; move r15, r16 ; prefetch r25
    [all...]
  /external/llvm/test/MC/X86/
3DNow.s 73 // CHECK: prefetch (%rax) # encoding: [0x0f,0x0d,0x00]
75 prefetch (%rax) label
  /development/ndk/platforms/android-9/arch-mips/include/asm/
processor.h 29 #include <asm/prefetch.h>
  /prebuilts/ndk/current/platforms/android-12/arch-mips/usr/include/asm/
processor.h 29 #include <asm/prefetch.h>
  /prebuilts/ndk/current/platforms/android-13/arch-mips/usr/include/asm/
processor.h 29 #include <asm/prefetch.h>

Completed in 1143 milliseconds

1 2 3 4