/external/compiler-rt/lib/builtins/arm/ |
divdf3vfp.S | 23 vdiv.f64 d5, d6, d7
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divsf3vfp.S | 23 vdiv.f32 s13, s14, s15
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
vfpv3-32drs.d | 48 0[0-9a-f]+ <[^>]+> ee853b06 (vdiv\.f64|fdivd) d3, d5, d6 49 0[0-9a-f]+ <[^>]+> ee82cb84 (vdiv\.f64|fdivd) d12, d18, d4 50 0[0-9a-f]+ <[^>]+> eec32ba4 (vdiv\.f64|fdivd) d18, d19, d20
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vfp-neon-syntax-inc.s | 75 dyadic_c vdiv
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vfp-neon-syntax.d | 76 0[0-9a-f]+ <[^>]+> ee800a81 (vdiv\.f32|fdivs) s0, s1, s2 77 0[0-9a-f]+ <[^>]+> ee810b02 (vdiv\.f64|fdivd) d0, d1, d2
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vfp-neon-syntax_t2.d | 91 0[0-9a-f]+ <[^>]+> ee80 0a81 (vdiv\.f32|fdivs) s0, s1, s2 92 0[0-9a-f]+ <[^>]+> ee81 0b02 (vdiv\.f64|fdivd) d0, d1, d2
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vfp1.d | 19 0+024 <[^>]*> ee800b00 (vdiv\.f64|fdivd) d0, d0, d0
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vfp1_t2.d | 19 0+024 <[^>]*> ee80 0b00 (vdiv\.f64|fdivd) d0, d0, d0
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vfp1xD.d | 20 0+028 <[^>]*> ee800a00 (vdiv\.f32|fdivs) s0, s0, s0
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vfp1xD_t2.d | 20 0+028 <[^>]*> ee80 0a00 (vdiv\.f32|fdivs) s0, s0, s0
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/external/llvm/test/MC/ARM/ |
simple-fp-encoding.s | 13 vdiv.f64 d16, d17, d16 14 vdiv.f32 s0, s1, s0 15 vdiv.f32 s5, s7 16 vdiv.f64 d5, d7 18 @ CHECK: vdiv.f64 d16, d17, d16 @ encoding: [0xa0,0x0b,0xc1,0xee] 19 @ CHECK: vdiv.f32 s0, s1, s0 @ encoding: [0x80,0x0a,0x80,0xee] 20 @ CHECK: vdiv.f32 s5, s5, s7 @ encoding: [0xa3,0x2a,0xc2,0xee] 21 @ CHECK: vdiv.f64 d5, d5, d7 @ encoding: [0x07,0x5b,0x85,0xee]
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single-precision-fp.s | 7 vdiv.f64 d4, d5, d6 15 @ CHECK-ERRORS-NEXT: vdiv.f64 d4, d5, d6
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/external/valgrind/none/tests/arm/ |
vfp.stdout.exp | [all...] |
/external/v8/test/cctest/ |
test-disasm-arm.cc | 530 COMPARE(vdiv(d2, d2, d2), 531 "ee822b02 vdiv.f64 d2, d2, d2"); 532 COMPARE(vdiv(d6, d7, d7, hi), 535 COMPARE(vdiv(s2, s2, s2), 536 "ee811a01 vdiv.f32 s2, s2, s2"); 537 COMPARE(vdiv(s6, s7, s7, hi), 700 COMPARE(vdiv(d16, d17, d18), 701 "eec10ba2 vdiv.f64 d16, d17, d18"); [all...] |
test-assembler-arm.cc | 1063 __ vdiv(d25, d25, d18); 1179 __ vdiv(d2, d0, d1); [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
r5900-error-vu0.s | 114 vdiv $Q, $vf0x, $vf0xy 115 vdiv $Q, $vf0xyzw, $vf31y 116 vdiv $Q, $vf1, $vf2z 117 vdiv $Q, $vf31x, $vf15 118 vdiv $0, $vf31w, $vf31y 119 vdiv $Q, $vf32y, $vf0w
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r5900-error-vu0.l | 108 .*: Error: invalid operands `vdiv \$Q,\$vf0x,\$vf0xy' 109 .*: Error: invalid operands `vdiv \$Q,\$vf0xyzw,\$vf31y' 110 .*: Error: invalid operands `vdiv \$Q,\$vf1,\$vf2z' 111 .*: Error: invalid operands `vdiv \$Q,\$vf31x,\$vf15' 112 .*: Error: invalid operands `vdiv \$0,\$vf31w,\$vf31y' 113 .*: Error: invalid operands `vdiv \$Q,\$vf32y,\$vf0w' [all...] |
r5900-full-vu0.s | 29 vdiv $Q,$vf1y,$vf11x
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r5900-full-vu0.d | 29 [0-9a-f]+ <[^>]*> 4a2b0bbc vdiv \$Q,\$vf1y,\$vf11x
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r5900-all-vu0.s | [all...] |
/external/v8/src/arm/ |
disasm-arm.cc | [all...] |
assembler-arm.h | [all...] |
assembler-arm.cc | 3218 void Assembler::vdiv(const DwVfpRegister dst, function in class:v8::internal::Assembler 3238 void Assembler::vdiv(const SwVfpRegister dst, const SwVfpRegister src1, function in class:v8::internal::Assembler [all...] |
/external/v8/src/compiler/arm/ |
code-generator-arm.cc | 719 __ vdiv(i.OutputFloat32Register(), i.InputFloat32Register(0), 770 __ vdiv(i.OutputFloat64Register(), i.InputFloat64Register(0), [all...] |
/external/v8/src/crankshaft/arm/ |
lithium-codegen-arm.cc | [all...] |