/external/mesa3d/src/glsl/ |
opt_constant_propagation.cpp | 49 acp_entry(ir_variable *var, unsigned write_mask, ir_constant *constant) 54 this->write_mask = write_mask; 56 this->initial_values = write_mask; 62 this->write_mask = src->write_mask; 69 unsigned write_mask; member in class:__anon20118::acp_entry 79 kill_entry(ir_variable *var, unsigned write_mask) 83 this->write_mask = write_mask; 87 unsigned write_mask; member in class:__anon20118::kill_entry [all...] |
opt_copy_propagation_elements.cpp | 57 acp_entry(ir_variable *lhs, ir_variable *rhs, int write_mask, int swizzle[4]) 61 this->write_mask = write_mask; 69 this->write_mask = a->write_mask; 75 unsigned int write_mask; member in class:__anon20121::acp_entry 83 kill_entry(ir_variable *var, int write_mask) 86 this->write_mask = write_mask; 90 unsigned int write_mask; member in class:__anon20121::kill_entry 469 int write_mask = ir->write_mask; local [all...] |
opt_dead_code_local.cpp | 54 this->available = ir->write_mask; 180 ir->write_mask); 188 int remove = entry->available & ir->write_mask; 192 entry->ir->write_mask, 193 remove, entry->ir->write_mask & ~remove); 204 entry->ir->write_mask &= ~remove; 206 if (entry->ir->write_mask == 0) { 213 * write_mask. 220 if ((entry->ir->write_mask | remove) & (1 << i)) {
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lower_vector.cpp | 147 unsigned write_mask; local 160 write_mask = 0; 175 write_mask |= (1U << i); 179 assert((write_mask == 0) == (assigned == 0)); 190 new(mem_ctx) ir_assignment(lhs, c, NULL, write_mask);
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ir.cpp | 87 unsigned write_mask = 0; local 101 write_mask |= (((this->write_mask >> i) & 1) << c); 105 this->write_mask = write_mask; 119 if (write_mask & (1 << i)) 144 if (mask != this->write_mask) 155 ir_rvalue *condition, unsigned write_mask) 161 this->write_mask = write_mask; [all...] |
lower_variable_index_to_cond_assign.cpp | 190 unsigned int write_mask; member in struct:assignment_generator 218 ? new(mem_ctx) ir_assignment(element, variable, condition, write_mask) 446 ag.write_mask = orig_assign->write_mask;
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lower_mat_op_to_vec.cpp | 364 assert(column_assign->write_mask != 0); 387 assert(column_assign->write_mask != 0);
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ast_function.cpp | 828 const unsigned write_mask = ((1U << rhs_components) - 1) local 839 new(ctx) ir_assignment(lhs, rhs, NULL, write_mask); 888 const unsigned write_mask = ((1U << count) - 1) << row_base; local 890 return new(mem_ctx) ir_assignment(column_ref, src, NULL, write_mask); 1068 const unsigned write_mask = (1U << last_row) - 1; local [all...] |
ir.h | 819 unsigned write_mask); 890 unsigned write_mask:4; [all...] |
ir_validate.cpp | 541 if (ir->write_mask == 0) { 550 if (ir->write_mask & (1 << i))
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ir_clone.cpp | 278 this->write_mask);
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ir_print_visitor.cpp | 355 if ((ir->write_mask & (1 << i)) != 0) {
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ir_constant_expression.cpp | [all...] |
/external/mesa3d/src/gallium/drivers/r600/ |
r600_shader.h | 37 unsigned write_mask; member in struct:r600_shader_io
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r600_shader.c | 828 ctx->shader->output[i].write_mask = d->Declaration.UsageMask; 2550 unsigned write_mask = inst->Dst[0].Register.WriteMask; local 3415 unsigned write_mask = inst->Dst[0].Register.WriteMask; local 3464 unsigned write_mask = inst->Dst[0].Register.WriteMask; local 3520 unsigned write_mask = inst->Dst[0].Register.WriteMask; local [all...] |
/external/mesa3d/src/gallium/auxiliary/tgsi/ |
tgsi_util.c | 176 unsigned write_mask = inst->Dst[0].Register.WriteMask; local 221 read_mask = write_mask; 231 read_mask = write_mask & TGSI_WRITEMASK_XY ? TGSI_WRITEMASK_X : 0; 236 read_mask = write_mask & TGSI_WRITEMASK_XYZ ? TGSI_WRITEMASK_X : 0;
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/external/mesa3d/src/gallium/drivers/i915/ |
i915_fpc_optimize.c | 75 unsigned write_mask) 77 if ( write_mask & TGSI_WRITEMASK_X && r->Register.SwizzleX != TGSI_SWIZZLE_X) 79 if ( write_mask & TGSI_WRITEMASK_Y && r->Register.SwizzleY != TGSI_SWIZZLE_Y) 81 if ( write_mask & TGSI_WRITEMASK_Z && r->Register.SwizzleZ != TGSI_SWIZZLE_Z) 83 if ( write_mask & TGSI_WRITEMASK_W && r->Register.SwizzleW != TGSI_SWIZZLE_W) 124 unsigned write_mask, 127 if ( write_mask & TGSI_WRITEMASK_X ) 132 if ( write_mask & TGSI_WRITEMASK_Y ) 137 if ( write_mask & TGSI_WRITEMASK_Z ) 142 if ( write_mask & TGSI_WRITEMASK_W [all...] |
/external/mesa3d/src/mesa/drivers/dri/i965/ |
brw_fs_vector_splitting.cpp | 182 is_power_of_two(ir->write_mask) && 275 if (!(ir->write_mask & (1 << i))) 305 switch (ir->write_mask) { 324 ir->write_mask = (1 << 0);
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brw_fs_channel_expressions.cpp | 126 assert(ir->write_mask == (1 << ir->lhs->type->components()) - 1);
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brw_fs_visitor.cpp | 684 ir->write_mask == (1 << ir->lhs->type->vector_elements) - 1))) 736 if (ir->write_mask & (1 << i)) { [all...] |
brw_vec4_visitor.cpp | [all...] |
/external/mesa3d/src/gallium/drivers/svga/svgadump/ |
svga_shader_dump.c | 401 if (dstreg.write_mask != SVGA3DWRITEMASK_ALL) { 403 if (dstreg.write_mask & SVGA3DWRITEMASK_0) 405 if (dstreg.write_mask & SVGA3DWRITEMASK_1) 407 if (dstreg.write_mask & SVGA3DWRITEMASK_2) 409 if (dstreg.write_mask & SVGA3DWRITEMASK_3)
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svga_shader.h | 134 unsigned write_mask:4; member in struct:sh_dstreg
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/external/mesa3d/src/mesa/program/ |
ir_to_mesa.cpp | [all...] |
/external/mesa3d/src/mesa/state_tracker/ |
st_glsl_to_tgsi.cpp | [all...] |