| /external/llvm/lib/ExecutionEngine/RuntimeDyld/ |
| RuntimeDyldMachO.cpp | 48 uint8_t *Src = Sections[RE.SectionID].getAddress() + RE.Offset;
66 uint64_t Offset = RelI->getOffset();
67 uint8_t *LocalAddress = Section.getAddressWithOffset(Offset);
81 RelocationEntry R(SectionID, Offset, RelocType, Addend, IsPCRel, Size);
111 Value.Offset = SymInfo.getOffset() + RE.Addend;
114 Value.Offset = RE.Addend;
121 Value.Offset = RE.Addend - Addr;
132 Value.Offset += RI->getOffset() + OffsetToNextPC + SecI->getAddress();
138 uint8_t *LocalAddress = Section.getAddress() + RE.Offset;
139 uint64_t FinalAddress = Section.getLoadAddress() + RE.Offset;
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64FrameLowering.cpp | 66 // To access the data in a frame, at-compile time, a constant offset must be
82 // so large that the offset can't be encoded in the immediate fields of loads
185 // 1) For offset <= 12-bit, we use LSL #0
186 // 2) For 12-bit <= offset <= 24-bit, we use two instructions. One uses
230 int64_t Offset = MFI->getObjectOffset(Info.getFrameIdx()) -
246 nullptr, DwarfReg, Offset - TotalSkipped));
265 // by addding that offset - 16 = -getImm()*8 - 2*8 = -(getImm() + 2) * 8.
267 assert(FPOffset >= 0 && "Bad Framepointer Offset");
419 // stp xa,bx, [sp, -#offset]!
421 // stp x28, x27, [sp, #offset-32
[all...] |
| AArch64LoadStoreOptimizer.cpp | 121 unsigned BaseReg, int Offset);
600 // Which register is Rt and which is Rt2 depends on the offset order.
619 // Change the scaled offset from small to large type.
621 assert(((OffsetImm & 1) == 0) && "Unexpected offset to merge");
720 // Change the scaled offset from small to large type.
722 assert(((OffsetImm & 1) == 0) && "Unexpected offset to merge");
826 static bool inBoundsForPair(bool IsUnscaled, int Offset, int OffsetStride) {
827 // Convert the byte-offset used by unscaled into an "element" offset used
830 Offset /= OffsetStride
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseRegisterInfo.cpp | 320 // Conservatively estimate whether the negative offset from the frame
476 needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const {
482 // to materialize the offset if it won't fit in the literal field. Estimate
485 // we don't know everything for certain yet) whether this offset is likely
506 // Approximate the offset and see if it's legal for the instruction.
507 // Note that the incoming offset is based on the SP value at function entry,
514 // Estimate an offset from the frame pointer.
518 int64_t FPOffset = Offset - 8;
522 // Estimate an offset from the stack pointer.
523 // The incoming offset is relating to the SP at the start of the function
[all...] |
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMAsmBackend.cpp | 55 // Name Offset (bits) Size (bits) Flags
98 // Name Offset (bits) Size (bits) Flags
192 // low bit being an implied zero. There's an implied +4 offset for the
197 int64_t Offset = int64_t(Value) - 4;
198 if (Offset > 2046 || Offset < -2048)
204 // low bit being an implied zero. There's an implied +4 offset for the
209 int64_t Offset = int64_t(Value) - 4;
210 if (Offset > 254 || Offset < -256
500 uint32_t offset = (Value - 4) >> 1; local
527 uint32_t offset = (Value - 2) >> 2; local
[all...] |
| ARMMCCodeEmitter.cpp | 604 // Thumb BL and BLX use a strange offset encoding where bits 22 and 21 are
606 static int32_t encodeThumbBLOffset(int32_t offset) {
607 offset >>= 1;
608 uint32_t S = (offset & 0x800000) >> 23;
609 uint32_t J1 = (offset & 0x400000) >> 22;
610 uint32_t J2 = (offset & 0x200000) >> 21;
616 offset &= ~0x600000;
617 offset |= J1 << 22;
618 offset |= J2 << 21;
620 return offset;
[all...] |
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsTargetStreamer.cpp | 93 SmallVector<MCInst, 3> &StoreInsts, int Offset) {
368 SmallVector<MCInst, 3> &StoreInsts, int Offset) {
369 MipsTargetStreamer::emitDirectiveCpRestore(StoreInsts, Offset);
370 OS << "\t.cprestore\t" << Offset << "\n";
790 SmallVector<MCInst, 3> &StoreInsts, int Offset) {
791 MipsTargetStreamer::emitDirectiveCpRestore(StoreInsts, Offset);
792 // .cprestore offset
795 // sw $gp, offset($sp)
826 // sd $gpreg, offset($sp)
|
| /external/llvm/lib/Target/Mips/ |
| MipsAsmPrinter.cpp | 217 // -- Mask directives "(f)mask bitmask, offset"
222 // offset - the position before stack pointer subtraction indicating where
235 // left to right, RA is saved first. A -8 offset means that after the
542 assert(OffsetMO.isImm() && "Unexpected offset for inline asm memory operand.");
543 int Offset = OffsetMO.getImm();
548 Offset += 4;
555 O << Offset << "($" << MipsInstPrinter::getRegisterName(BaseMO.getReg()) << ")";
648 // MemOperand is always last operand of instruction (base + offset).
[all...] |
| MipsSEFrameLowering.cpp | 350 int64_t Offset = 4 * (Subtarget.isLittle() ? N : (1 - N));
366 TII.loadRegFromStack(MBB, I, DstReg, FI, RC2, &RegInfo, Offset);
434 int64_t Offset = MFI->getObjectOffset(I->getFrameIdx());
449 MCCFIInstruction::createOffset(nullptr, Reg0, Offset));
454 MCCFIInstruction::createOffset(nullptr, Reg1, Offset + 4));
465 MCCFIInstruction::createOffset(nullptr, Reg0, Offset));
470 MCCFIInstruction::createOffset(nullptr, Reg1, Offset + 4));
476 nullptr, MRI->getDwarfRegNum(Reg, 1), Offset));
494 int64_t Offset = MFI->getObjectOffset(MipsFI->getEhDataRegFI(I));
497 MCCFIInstruction::createOffset(nullptr, Reg, Offset));
[all...] |
| MipsSEISelDAGToDAG.cpp | 280 SDValue &Offset) const {
285 Offset = CurDAG->getTargetConstant(0, SDLoc(Addr), ValTy);
291 /// Match frameindex+offset and frameindex|offset
293 SDValue &Offset,
307 Offset = CurDAG->getTargetConstant(CN->getZExtValue(), SDLoc(Addr),
318 SDValue &Offset) const {
320 if (selectAddrFrameIndex(Addr, Base, Offset))
326 Offset = Addr.getOperand(1);
337 if (selectAddrFrameIndexOffset(Addr, Base, Offset, 16)
[all...] |
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyPEI.cpp | 375 MFI->CreateFixedSpillStackObject(RC->getSize(), FixedSlot->Offset);
515 /// AdjustStackOffset - Helper function used to adjust the stack frame offset.
518 bool StackGrowsDown, int64_t &Offset,
522 Offset += MFI->getObjectSize(FrameIdx);
531 Offset = RoundUpToAlignment(Offset, Align, Skew);
534 DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << -Offset << "]\n");
535 MFI->setObjectOffset(FrameIdx, -Offset); // Set the computed offset
537 DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << Offset << "]\n")
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombinePHI.cpp | 193 // offset calculation, but all the predecessors will have to materialize the
273 // If this load is a load from a GEP with a constant offset from an alloca,
275 // load [constant stack offset]. Sinking it will cause us to have to
710 // of PHIs, along with their offset. These are the things we want to rewrite.
774 // extracted out of it. First, sort the users by their offset and size.
793 unsigned Offset = PHIUsers[UserI].Shift;
800 if ((EltPHI = ExtractedVals[LoweredPHIRecord(PN, Offset, Ty)]) == nullptr) {
804 PN->getName()+".off"+Twine(Offset), PN);
829 if (Value *Res = ExtractedVals[LoweredPHIRecord(InPHI, Offset, Ty)]) {
839 if (Offset)
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| MemCpyOptimizer.cpp | 52 // Compute the offset implied by the rest of the indices.
53 int64_t Offset = 0;
58 if (OpC->isZero()) continue; // No offset.
60 // Handle struct indices, which add their field offset to the pointer.
62 Offset += DL.getStructLayout(STy)->getElementOffset(OpC->getZExtValue());
69 Offset += Size*OpC->getSExtValue();
72 return Offset;
75 /// Return true if Ptr1 is provably equal to Ptr2 plus a constant offset, and
76 /// return that constant offset. For example, Ptr1 might be &A[42], and Ptr2
77 /// might be &A[40]. In this case offset would be -8
[all...] |
| SeparateConstOffsetFromGEP.cpp | 49 // address by adding a simple offset to the common part, saving many registers.
51 // It works by splitting each GEP into a variadic base and a constant offset.
110 // %6 = add i64 %3, struct_field_3 ; Constant offset
120 // %12 = add i64 %11, struct_field_2 ; Constant offset
133 // %6 = getelementptr i8* %5, struct_field_3 ; Constant offset
143 // %12 = getelementptr i8* %11, struct_field_2 ; Constant offset
185 "disable-separate-const-offset-from-gep", cl::init(false),
186 cl::desc("Do not separate the constant offset from a GEP instruction"),
198 /// \brief A helper class for separating a constant offset from a GEP index.
203 /// constant offset, so that we can separate the index to (a << 3) + b and 5
[all...] |
| /external/llvm/tools/llvm-cxxdump/ |
| llvm-cxxdump.cpp | 84 uint64_t Offset = Reloc.getOffset();
85 if (Offset >= SymOffset && Offset < SymEnd) {
106 uint64_t Offset = Reloc.getOffset();
107 if (Offset >= SymOffset && Offset < SymEnd)
108 Collection[std::make_pair(SymName, Offset - SymOffset)] = *RelocSymName;
206 // offset into the section and the symbol used for the relocation.
238 // Each relocation names a base class descriptor. We note the offset into
330 uint64_t Offset = VFTableEntry.first.second
[all...] |
| /external/llvm/tools/llvm-readobj/ |
| ARMEHABIPrinter.h | 67 void Decode(const uint8_t *Opcodes, off_t Offset, size_t Length);
290 void OpcodeDecoder::Decode(const uint8_t *Opcodes, off_t Offset, size_t Length) {
291 for (unsigned OCI = Offset; OCI < Length + Offset; ) {
334 void PrintOpcodes(const uint8_t *Entry, size_t Length, off_t Offset) const;
418 /// |0| personality routine offset |
466 size_t Length, off_t Offset) const {
468 OpcodeDecoder(OCC.W).Decode(Entry, Offset, Length);
479 /// * The first word contains a PREL31 offset to the start of a function with
482 /// - The PREL31 offset of the start of the table entry for the function
[all...] |
| MachODumper.cpp | 259 uint32_t Offset;
311 Section.Offset = Sect.offset;
323 Section.Offset = Sect.offset;
457 W.printNumber("Offset", MOSection.Offset);
530 uint64_t Offset = Reloc.getOffset();
558 W.printHex("Offset", Offset);
[all...] |
| /external/llvm/unittests/IR/ |
| InstructionsTest.cpp | 343 int64_t Offset;
348 GetPointerBaseWithConstantOffset(Gep0, Offset, TD);
349 GetPointerBaseWithConstantOffset(Gep1, Offset, TD);
350 GetPointerBaseWithConstantOffset(Gep2, Offset, TD);
351 GetPointerBaseWithConstantOffset(Gep3, Offset, TD);
|
| /external/llvm/utils/TableGen/ |
| FixedLenDecoderEmitter.cpp | 39 unsigned Base, Width, Offset;
41 : Base(B), Width(W), Offset(O) { }
52 void addField(unsigned Base, unsigned Width, unsigned Offset) {
53 Fields.push_back(EncodingField(Base, Width, Offset));
[all...] |
| /external/lzma/CPP/7zip/Archive/ |
| LzmaHandler.cpp | 408 UInt64 Offset;
420 UInt64 value = Offset + *inSize;
|
| /external/lzma/CPP/7zip/UI/Common/ |
| OpenArchive.h | 146 // if FormatIndex == ErrorFormatIndex, the archive is open with offset
218 HRESULT CheckZerosTail(const COpenOptions &op, UInt64 offset);
242 Int64 Offset; // it's offset of start of archive inside stream that is open by Archive Handler
251 UInt64 ArcStreamOffset; // offset of stream that is open by Archive Handler
252 Int64 GetGlobalOffset() const { return ArcStreamOffset + Offset; } // it's global offset of archive
|
| /external/sfntly/cpp/src/sfntly/ |
| font.h | 33 // extracted out for easier reference from other classes. Offset is the
210 int32_t offset,
274 struct Offset {
|
| /hardware/intel/img/psb_video/src/mrst/ |
| lnc_hostheader.c | 331 IMG_UINT8 Offset;
342 Offset = elt_p[mtx_hdr->Elements]->Size + 8 + 31;
343 Offset /= 32;/* Now contains rawbits size in words */
344 Offset += 1;/* Now contains rawbits+element_type size in words */
345 Offset *= 4;/* Convert to number of bytes (total size of structure in bytes, aligned to word boundary) */
347 Offset = 4;
352 P += Offset;
[all...] |
| /hardware/intel/img/psb_video/src/ |
| pnw_hostheader.c | 331 IMG_UINT8 Offset;
346 Offset = elt_p[mtx_hdr->Elements]->Size + 8 + 31;
347 Offset /= 32;/* Now contains rawbits size in words */
348 Offset += 1;/* Now contains rawbits+element_type size in words */
349 Offset *= 4;/* Convert to number of bytes (total size of structure in bytes, aligned to word boundary) */
351 Offset = 4;
359 P += Offset;
[all...] |
| tng_jpegES.h | 58 IMG_UINT32 Offset; /*!< Offset in the bitstream buffer */
|
