| /prebuilts/ndk/current/platforms/android-17/arch-mips/usr/include/machine/ |
| regnum.h | 65 #define SP 29
|
| /prebuilts/ndk/current/platforms/android-18/arch-mips/usr/include/machine/ |
| regnum.h | 65 #define SP 29
|
| /prebuilts/ndk/current/platforms/android-19/arch-mips/usr/include/machine/ |
| regnum.h | 65 #define SP 29
|
| /prebuilts/ndk/current/platforms/android-21/arch-mips/usr/include/machine/ |
| regnum.h | 65 #define SP 29
|
| /prebuilts/ndk/current/platforms/android-21/arch-mips64/usr/include/machine/ |
| regnum.h | 65 #define SP 29
|
| /prebuilts/ndk/current/platforms/android-23/arch-mips/usr/include/machine/ |
| regnum.h | 65 #define SP 29
|
| /prebuilts/ndk/current/platforms/android-23/arch-mips64/usr/include/machine/ |
| regnum.h | 65 #define SP 29
|
| /prebuilts/ndk/current/platforms/android-24/arch-mips/usr/include/machine/ |
| regnum.h | 65 #define SP 29
|
| /prebuilts/ndk/current/platforms/android-24/arch-mips64/usr/include/machine/ |
| regnum.h | 65 #define SP 29
|
| /prebuilts/ndk/current/platforms/android-9/arch-mips/usr/include/machine/ |
| regnum.h | 65 #define SP 29
|
| /toolchain/binutils/binutils-2.25/opcodes/ |
| rx-decode.c | 120 #define SP(t,r) rx_disp (1, t, r, (t!=3) ? RX_UByte : RX_Long, ld); P(t, 1);
767 /** 0000 0110 mx10 00sp 0000 0000 rsrc rdst sbb %1%S1, %0 */
771 int sp AU = op[1] & 0x03;
779 "/** 0000 0110 mx10 00sp 0000 0000 rsrc rdst sbb %1%S1, %0 */",
782 printf (" sp = 0x%x,", sp);
788 ID(sbb); SPm(sp, rsrc, mx); DR(rdst); F_OSZC;
[all...] |
| m10300-opc.c | 143 #define SP (IMM32_HIGH24_LOWSHIFT16+1)
147 #define PSW (SP+1)
456 { "mov", 0x3c, 0xfc, 0, FMT_S0, 0, {SP, AN0}},
457 { "mov", 0xf2f0, 0xfff3, 0, FMT_D0, 0, {AM1, SP}},
463 { "mov", 0x5800, 0xfcff, 0, FMT_S1, 0, {MEM(SP), DN0}},
466 { "mov", 0x5c00, 0xfcff, 0, FMT_S1, 0, {MEM(SP), AN0}},
469 { "mov", 0x4200, 0xf3ff, 0, FMT_S1, 0, {DM1, MEM(SP)}},
472 { "mov", 0x4300, 0xf3ff, 0, FMT_S1, 0, {AM1, MEM(SP)}},
474 { "mov", 0x5c00, 0xfc00, 0, FMT_S1, 0, {MEM2(IMM8, SP), AN0}},
477 { "mov", 0x5800, 0xfc00, 0, FMT_S1, 0, {MEM2(IMM8, SP), DN0}}
[all...] |
| /external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/org.eclipse.build.tools/src_rss/org/eclipse/releng/generators/rss/ |
| RSSFeedAddEntryTask.java | 119 private static final String SP = " "; //$NON-NLS-1$
239 System.out.println(Messages.getString("RSSFeedAddEntryTask.AddingEntryTo") + project + SP + Messages.getString("RSSFeedCommon.RSSFeedFile") + SP + file.toString() + ", " + Messages.getString("RSSFeedCommon.ToBePublishedAt") + feedURL); //$NON-NLS-1$ //$NON-NLS-2$ //$NON-NLS-3$ //$NON-NLS-4$ //$NON-NLS-5$ //$NON-NLS-6$
247 System.out.println(Messages.getString("RSSFeedCommon.RSSFeedFile") + SP + file.toString() + SP + Messages.getString("RSSFeedAddEntryTask.DoesNotExist")); //$NON-NLS-1$ //$NON-NLS-2$
336 String projectVersionString = project + SP + (!isNullString(buildAlias)? //$NON-NLS-1$
340 branch + SP + buildID); // 2.2.0.S200605051234 //$NON-NLS-1$
344 // <title>[announce] " + project + SP + branch + SP + buildID + " is available</title>
346 elem.setTextContent(Messages.getString("RSSFeedAddEntryTask.AnnouncePrefix") + projectVersionString + SP + Messages.getString("RSSFeedAddEntryTask.IsAvailable")); //$NON-NLS-1$ //$NON-NLS-2$ //$NON-NLS-3
[all...] |
| /external/libvpx/libvpx/vp8/encoder/ |
| mcomp.c | 198 #define SP(x) (((x)&3)<<1)
200 #define DIST(r,c) vfp->svf( PRE(r,c), y_stride, SP(c),SP(r), z,b->src_stride,&sse)
359 #undef SP
[all...] |
| /external/llvm/lib/CodeGen/ |
| PrologEpilogInserter.cpp | 286 // here. The sub/add sp instruction pairs are still inserted, but we don't
287 // need to track the SP adjustment for frame index elimination.
518 DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << -Offset << "]\n");
521 DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << Offset << "]\n");
548 StackProtector *SP = &getAnalysis<StackProtector>();
649 DEBUG(dbgs() << "alloc FI(" << Entry.first << ") at SP[" <<
684 switch (SP->getSSPLayout(MFI->getObjectAllocation(i))) {
758 // SP not FP. Align to MaxAlign so this works.
[all...] |
| StackColoring.cpp | 122 StackProtector *SP;
495 SP->adjustForColoring(From, To);
646 SP = &getAnalysis<StackProtector>();
|
| /external/llvm/lib/IR/ |
| DIBuilder.cpp | 101 for (auto *SP : SPs) {
102 if (MDTuple *Temp = SP->getVariables().get()) {
103 const auto &PV = PreservedVariables.lookup(SP);
725 auto *SP = getSubprogram(
732 AllSubprograms.push_back(SP);
733 trackIfUnresolved(SP);
734 return SP;
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEFrameLowering.cpp | 390 unsigned SP = ABI.GetStackPtr();
411 TII.adjustStackPtr(SP, -StackSize, MBB, MBBI);
505 // Insert instruction "move $fp, $sp" at this location.
506 BuildMI(MBB, MBBI, dl, TII.get(MOVE), FP).addReg(SP).addReg(ZERO)
517 // andi $sp, $sp, $Reg
524 BuildMI(MBB, MBBI, dl, TII.get(AND), SP).addReg(SP).addReg(VR);
527 // move $s7, $sp
530 .addReg(SP)
[all...] |
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyPEI.cpp | 302 // here. The sub/add sp instruction pairs are still inserted, but we don't
303 // need to track the SP adjustment for frame index elimination.
534 DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << -Offset << "]\n");
537 DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << Offset << "]\n");
564 StackProtector *SP = &getAnalysis<StackProtector>();
665 DEBUG(dbgs() << "alloc FI(" << Entry.first << ") at SP[" <<
700 switch (SP->getSSPLayout(MFI->getObjectAllocation(i))) {
774 // SP not FP. Align to MaxAlign so this works.
[all...] |
| /external/nist-sip/java/gov/nist/core/ |
| GenericObject.java | 54 protected static final String SP = Separators.SP;
|
| LexerCore.java | 53 public static final int SP = (int) ' ';
|
| /external/valgrind/none/tests/ppc32/ |
| test_dfp5.c | 144 static dfp_val_t _test_ddedpd(unsigned int SP, dfp_val_t *valB)
149 switch (SP) {
163 fprintf(stderr, "Invalid value %d for SP\n", SP);
171 static dfp_val_t _test_ddedpdq(unsigned int SP, dfp_val_t *valB)
176 switch (SP) {
190 fprintf(stderr, "Invalid value %d for SP\n", SP);
420 unsigned int SP;
429 for (SP = 0; SP < 4; SP++)
[all...] |
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/ |
| mcomp.c | 194 #define SP(x) (((x)&3)<<1)
196 #define DIST(r,c) vfp->svf( PRE(r,c), y_stride, SP(c),SP(r), z,b->src_stride,&sse)
355 #undef SP
[all...] |
| /art/runtime/arch/arm64/ |
| registers_arm64.h | 58 SP = 31, // SP and XZR are encoded in instructions using the register
|
| /external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/org.eclipse.build.tools/ |
| bugTools.jar | |
