/prebuilts/ndk/current/platforms/android-24/arch-mips64/usr/include/arpa/ |
nameser_compat.h | 106 unsigned opcode: 4; /* purpose of message */ member in struct:__anon66028 122 unsigned opcode :4; /* purpose of message */ member in struct:__anon66028
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/prebuilts/ndk/current/platforms/android-24/arch-x86/usr/include/arpa/ |
nameser_compat.h | 106 unsigned opcode: 4; /* purpose of message */ member in struct:__anon66806 122 unsigned opcode :4; /* purpose of message */ member in struct:__anon66806
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/prebuilts/ndk/current/platforms/android-24/arch-x86_64/usr/include/arpa/ |
nameser_compat.h | 106 unsigned opcode: 4; /* purpose of message */ member in struct:__anon67583 122 unsigned opcode :4; /* purpose of message */ member in struct:__anon67583
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/system/bt/hci/src/ |
hci_layer.c | 90 uint16_t opcode; member in struct:__anon72341 162 static waiting_command_t *get_waiting_command(command_opcode_t opcode); 362 STREAM_TO_UINT16(wait_entry->opcode, stream); 380 STREAM_TO_UINT16(wait_entry->opcode, stream); 536 LOG_ERROR(LOG_TAG, "%s hci layer timeout waiting for response to a command. opcode: 0x%x", __func__, wait_entry->opcode); 657 command_opcode_t opcode; local 664 STREAM_TO_UINT16(opcode, stream); 666 wait_entry = get_waiting_command(opcode); 669 if (opcode != HCI_COMMAND_NONE) [all...] |
/system/bt/stack/btu/ |
btu_hcif.c | 358 uint16_t opcode; 362 STREAM_TO_UINT16(opcode, stream); 366 if ((opcode & HCI_GRP_VENDOR_SPECIFIC) == HCI_GRP_VENDOR_SPECIFIC 368 || (opcode == HCI_BLE_RAND) 369 || (opcode == HCI_BLE_ENCRYPT) 782 static void btu_hcif_hdl_command_complete (UINT16 opcode, UINT8 *p, UINT16 evt_len, 785 switch (opcode) 843 btm_ble_rand_enc_complete (p, opcode, (tBTM_RAND_ENC_CB *)p_cplt_cback); 889 if ((opcode & HCI_GRP_VENDOR_SPECIFIC) == HCI_GRP_VENDOR_SPECIFIC) 890 btm_vsc_complete (p, opcode, evt_len, (tBTM_CMPL_CB *)p_cplt_cback) 908 command_opcode_t opcode; local 1105 command_opcode_t opcode; local [all...] |
/system/bt/vendor_libs/test_vendor_lib/src/ |
dual_mode_controller.cc | 146 #define SET_HANDLER(opcode, method) \ 147 active_hci_commands_[opcode] = \ 212 uint16_t opcode = command_packet->GetOpcode(); local 213 LOG_INFO(LOG_TAG, "Command opcode: 0x%04X, OGF: 0x%04X, OCF: 0x%04X", opcode, 218 if (active_hci_commands_.count(opcode) == 0) 222 active_hci_commands_[opcode](command_packet->GetPayload());
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/system/netd/tests/ |
dns_responder.cpp | 368 uint8_t opcode; member in struct:test::DNSHeader 458 // byte 2: 7:qr, 3-6:opcode, 2:aa, 1:tr, 0:rd 459 header.flags0 = (qr << 7) | (opcode << 3) | (aa << 2) | (tr << 1) | rd; 500 // byte 2: 7:qr, 3-6:opcode, 2:aa, 1:tr, 0:rd 502 opcode = (header.flags0 >> 3) & 0x0F; 738 if (header.opcode != ns_opcode::ns_o_query) { 739 ALOGI("unsupported request opcode received");
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/toolchain/binutils/binutils-2.25/gas/config/ |
tc-dlx.c | 26 #include "opcode/dlx.h" 43 /* handle of the OPCODE hash table */ 49 unsigned long opcode; member in struct:machine_it 307 /* This function will check the opcode and return 1 if the opcode is one 551 fix_ld_st_operand (unsigned long opcode, char* str) 553 /* Check the opcode. */ 554 switch ((int) opcode) 654 /* Instruction parsing. Takes a string containing the opcode. 664 unsigned long opcode; local [all...] |
tc-epiphany.c | 809 char *opcode; 817 opcode = fragP->fr_opcode; 819 /* Address opcode resides at in file space. */ 822 displacement = &opcode[1]; 845 *opcode |= OP4_IMM32; 846 displacement = &opcode[0]; 851 | opcode[0] 853 | (opcode[1] << 8) 854 | (opcode[2] << 16)); 862 *opcode |= OP4_BRANCH 802 char *opcode; local [all...] |
tc-i860.c | 26 #include "opcode/i860.h" 30 /* The opcode hash table. */ 57 unsigned long opcode; member in struct:i860_it 235 _("internal error: losing opcode: `%s' \"%s\"\n"), 294 pseudo[0].opcode = (the_insn.opcode & 0x001f0000) | 0xe4000000; 298 pseudo[1].opcode = (the_insn.opcode & 0x03ffffff) | 0xec000000 299 | ((the_insn.opcode & 0x001f0000) << 5); 313 pseudo[0].opcode = 0xec000000 | (the_insn.opcode & 0x03e00000 459 unsigned long opcode; local [all...] |
tc-mn10200.c | 24 #include "opcode/mn10200.h" 106 /* Opcode hash table. */ 349 int opcode = fragP->fr_literal[offset] & 0xff; 351 switch (opcode) 354 opcode = 0xe9; 357 opcode = 0xe8; 360 opcode = 0xe2; 363 opcode = 0xe0; 366 opcode = 0xe1; 369 opcode = 0xe3 346 int opcode = fragP->fr_literal[offset] & 0xff; local 403 int opcode = fragP->fr_literal[offset] & 0xff; local 468 int opcode = fragP->fr_literal[offset + 1] & 0xff; local 549 int opcode = fragP->fr_literal[offset + 1] & 0xff; local 880 struct mn10200_opcode *opcode; local [all...] |
tc-spu.c | 28 #define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \ 29 { MACFORMAT, (OPCODE) << (32-11), MNEMONIC, ASMFORMAT }, 30 #define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \ 31 { MACFORMAT, ((OPCODE) << (32-11)) | ((FB) << (32-18)), MNEMONIC, ASMFORMAT }, 32 #include "opcode/spu-insns.h" 44 unsigned int opcode; member in struct:spu_insn 314 insn.opcode = format->opcode; 353 && (insn.opcode & 0x7ff80) == 0 358 insn.opcode |= brinfo << 7 [all...] |
/toolchain/binutils/binutils-2.25/include/opcode/ |
dlx.h | 135 /* Following opcode was defined in the Hennessy's book as 136 "normal" opcode but was implemented in the RTL as special 148 /* Opcode word. */ 149 unsigned long opcode; member in struct:dlx_opcode
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tic30.h | 1 /* tic30.h -- Header file for TI TMS320C30 opcode table 22 /* FIXME: The opcode table should be in opcodes/tic30-opc.c, not in a 31 unsigned char opcode; member in struct:_register 220 unsigned int base_opcode; /* base_opcode is the fundamental opcode byte */ 221 /* the bits in opcode_modifier are used to generate the final opcode from [all...] |
tic54x.h | 1 /* tic54x.h -- Header file for TI TMS320C54X opcode table 87 /* The opcode mnemonic */ 91 /* The significant bits in the opcode. Other bits are zero. 92 Instructions with more than 16 bits of opcode store the rest in the upper 95 unsigned short opcode; member in struct:_template 118 /* Ones in this mask indicate which bits must match the opcode field. 119 Zeroes indicate don't care bits (operands and/or opcode options) */ 130 #define B_BRANCH 1 /* next insn is in opcode */ 145 unsigned short opcode2, mask2; /* some insns have an extended opcode */
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/toolchain/binutils/binutils-2.25/opcodes/ |
aarch64-gen.c | 1 /* aarch64-gen.c -- Generate tables and routines for opcode lookup and 29 #include "opcode/aarch64.h" 40 aarch64_insn opcode; member in struct:opcode_node 73 ent->opcode = 0; 143 opcode is a programmer friendly pseudo instruction available only in 146 /* Skip alias (inc. pseudo) opcode. */ 153 (*new_ent)->opcode = ent->opcode; 164 get_aarch64_opcode (ent)->opcode, get_aarch64_opcode (ent)->mask, 195 /* The largest number of opcode entries that exist at a leaf node of th 1096 const aarch64_opcode *opcode; local [all...] |
hppa-dis.c | 27 #include "opcode/hppa.h" 377 const struct pa_opcode *opcode = &pa_opcodes[i]; local 379 if ((insn & opcode->mask) == opcode->match) 383 if (opcode->arch == pa20w) 386 (*info->fprintf_func) (info->stream, "%s", opcode->name); 388 if (!strchr ("cfCY?-+nHNZFIuv{", opcode->args[0])) 390 for (s = opcode->args; *s != '\0'; ++s) 779 which distinguish true/false conditions by opcode
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m68k-dis.c | 27 #include "opcode/m68k.h" 628 an opcode tabe error was found or -3 to simply abort. 1347 The only place this is stored in the opcode table is 1516 unsigned long opcode = opc->opcode; local [all...] |
opc2c.c | 1 /* opc2c.c --- generate C opcode decoder code from from .opc file 6 This file is part of the GNU opcode library. 104 } opcode; typedef in typeref:struct:__anon74835 107 opcode ** opcodes; 108 opcode * op; 129 opcode prefix_text, suffix_text; 145 opcode * op; 152 next_varybits (int bits, opcode * op, int byte) 174 valid_varybits (int bits, opcode * op, int byte) 237 const opcode * a = *(const opcode **) va [all...] |
tic6x-dis.c | 25 #include "opcode/tic6x.h" 33 #include "opcode/tic6x-insn-formats.h" 48 #include "opcode/tic6x-control-registers.h" 52 /* Define the opcode table. */ 103 #include "opcode/tic6x-opcode-table.h" 142 /* Extract the bits corresponding to FIELD from OPCODE. */ 145 tic6x_field_bits (unsigned int opcode, const tic6x_insn_field *field) 151 return (opcode >> field->bitfields[0].low_pos) & ((1u << field->bitfields[0].width) - 1); 154 val |= ((opcode >> field->bitfields[i].low_pos) & ((1u << field->bitfields[i].width) - 1) 243 unsigned int opcode; local [all...] |
/prebuilts/tools/common/m2/repository/org/jacoco/org.jacoco.ant/0.7.1.201405082137/ |
org.jacoco.ant-0.7.1.201405082137-nodeps.jar | |
/prebuilts/tools/common/m2/repository/org/jacoco/org.jacoco.ant/0.7.3.201501221555/ |
org.jacoco.ant-0.7.3.201501221555-nodeps.jar | |
/prebuilts/tools/common/m2/repository/org/jacoco/org.jacoco.ant/0.7.4.201502262128/ |
org.jacoco.ant-0.7.4.201502262128-nodeps.jar | |
/prebuilts/tools/common/m2/repository/org/jacoco/org.jacoco.core/0.7.1.201405082137/ |
org.jacoco.core-0.7.1.201405082137.jar | |
/prebuilts/tools/common/m2/repository/org/jacoco/org.jacoco.core/0.7.3.201501221555/ |
org.jacoco.core-0.7.3.201501221555.jar | |