| /external/mesa3d/src/gallium/drivers/nv30/ |
| nv30_transfer.c | 405 struct nv04_fifo *fifo = push->channel->data; local
439 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
440 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
450 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
460 PUSH_RELOC(push, src->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
502 struct nv04_fifo *fifo = push->channel->data local
692 struct nv04_fifo *fifo = nv->screen->channel->data; local
[all...] |
| nv30_screen.c | 329 struct nv04_fifo *fifo; local
390 fifo = screen->base.channel->data;
447 ret = nouveau_bo_wrap(screen->base.device, fifo->notify, &screen->notify);
462 PUSH_DATA (push, fifo->vram); /* TEXTURE0 */
463 PUSH_DATA (push, fifo->gart); /* TEXTURE1 */
464 PUSH_DATA (push, fifo->vram); /* COLOR1 */
466 PUSH_DATA (push, fifo->vram); /* COLOR0 */
467 PUSH_DATA (push, fifo->vram); /* ZETA */
468 PUSH_DATA (push, fifo->vram); /* VTXBUF0 */
469 PUSH_DATA (push, fifo->gart); /* VTXBUF1 *
[all...] |
| /external/glide/library/src/main/java/com/bumptech/glide/load/engine/executor/ |
| FifoPriorityThreadPoolExecutor.java | 12 * A FIFO priority {@link ThreadPoolExecutor} that prioritizes submitted {@link Runnable}s by assuming they implement
15 * same time. Runnables with the same priority will be executed in FIFO order.
48 final Thread result = new Thread(runnable, "fifo-pool-thread-" + threadNum) {
|
| /external/fio/t/ |
| btrace2fio.c | 11 #include "../fifo.h"
170 * fifo refill frontend, to avoid reading data in trace sized bites
172 static int refill_fifo(struct fifo *fifo, int fd)
179 if (total > fifo_room(fifo))
180 total = fifo_room(fifo);
189 ret = fifo_put(fifo, buf, ret);
195 * Retrieve 'len' bytes from the fifo, refilling if necessary.
197 static int trace_fifo_get(struct fifo *fifo, int fd, void *buf
484 struct fifo *fifo; local
[all...] |
| /external/libnfc-nxp/src/ |
| phFriNfc_LlcpUtils.c | 190 * Initializes a Fifo Cyclic Buffer to point to some allocated memory.
204 * Clears the Fifo Cyclic Buffer - loosing any data that was in it.
214 * Attempts to write dataLength bytes to the specified Fifo Cyclic Buffer.
254 * Attempts to read dataLength bytes from the specified Fifo Cyclic Buffer.
296 * Returns the number of bytes currently stored in Fifo Cyclic Buffer.
326 * Returns the available room for writing in Fifo Cyclic Buffer.
|
| /external/iproute2/tc/ |
| q_fifo.c | 2 * q_fifo.c FIFO.
28 fprintf(stderr, "Usage: ... <[p|b]fifo | pfifo_head_drop> [ limit NUMBER ]\n");
|
| /hardware/invensense/6515/libsensors_iio/software/core/mllite/linux/ |
| inv_sysfs_utils.h | 17 * @buffer: Ring buffer attached to FIFO.
21 * @fifo_rate: FIFO rate/ODR.
|
| /hardware/invensense/65xx/libsensors_iio/software/core/mllite/linux/ |
| inv_sysfs_utils.h | 11 * @buffer: Ring buffer attached to FIFO.
15 * @fifo_rate: FIFO rate/ODR.
|
| /hardware/libhardware/tests/input/evdev/ |
| TestHelpers.cpp | 51 LOG_FATAL_IF(result < 0, "could not create fifo %s. errno=%d", mName, errno);
54 LOG_FATAL_IF(mFd < 0, "could not open fifo %s. errno=%d", mName, errno);
|
| /external/kernel-headers/original/uapi/linux/ |
| fdreg.h | 79 #define FD_CONFIGURE 0x13 /* configure FIFO operation */
84 #define FD_UNLOCK 0x14 /* Fifo config unlock */
85 #define FD_LOCK 0x94 /* Fifo config lock */
116 #define FDC_82072 0x40 /* Intel 82072; 8272a + FIFO + DUMPREGS */
|
| /external/libchrome/base/ |
| single_thread_task_runner.h | 22 // - Add tasks to a FIFO and signal to a non-MessageLoop thread for them to
|
| /external/webrtc/webrtc/modules/video_coding/codecs/test/ |
| predictive_packet_manipulator.h | 31 // FIFO queue so they will be returned in the same order they were added.
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/linux/ |
| fdreg.h | 79 #define FD_CONFIGURE 0x13 /* configure FIFO operation */
84 #define FD_UNLOCK 0x14 /* Fifo config unlock */
85 #define FD_LOCK 0x94 /* Fifo config lock */
116 #define FDC_82072 0x40 /* Intel 82072; 8272a + FIFO + DUMPREGS */
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/linux/ |
| fdreg.h | 79 #define FD_CONFIGURE 0x13 /* configure FIFO operation */
84 #define FD_UNLOCK 0x14 /* Fifo config unlock */
85 #define FD_LOCK 0x94 /* Fifo config lock */
116 #define FDC_82072 0x40 /* Intel 82072; 8272a + FIFO + DUMPREGS */
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/linux/usb/ |
| functionfs.h | 134 * when the fifo is loaded, before the host reads the data;
136 * complete when they're sitting in the FIFO unread.
137 * THIS returns how many bytes are "unclaimed" in the endpoint fifo
142 /* discards any unclaimed data in the fifo. */
|
| /external/mesa3d/src/mesa/drivers/dri/nouveau/ |
| nv20_context.c | 101 struct nv04_fifo *fifo = hw->chan->data; local
109 PUSH_DATA (push, fifo->vram);
110 PUSH_DATA (push, fifo->gart);
112 PUSH_DATA (push, fifo->vram);
113 PUSH_DATA (push, fifo->vram);
115 PUSH_DATA (push, fifo->vram);
116 PUSH_DATA (push, fifo->gart);
173 PUSH_DATA (push, fifo->vram);
175 PUSH_DATA (push, fifo->vram);
|
| nv10_context.c | 205 struct nv04_fifo *fifo = hw->chan->data; local
214 PUSH_DATA (push, fifo->vram);
215 PUSH_DATA (push, fifo->gart);
216 PUSH_DATA (push, fifo->gart);
218 PUSH_DATA (push, fifo->vram);
219 PUSH_DATA (push, fifo->vram);
250 PUSH_DATA (push, fifo->vram);
251 PUSH_DATA (push, fifo->vram);
|
| /hardware/bsp/intel/peripheral/libupm/src/lsm9ds0/ |
| lsm9ds0.h | 252 CTRL_REG3_G_I2_EMPTY = 0x01, // FIFO empty on DRDY_G
253 CTRL_REG3_G_I2_ORUN = 0x02, // FIFO Overrun intr
254 CTRL_REG3_G_I2_WTM = 0x04, // FIFO watermark intr
361 FIFO_CTRL_REG_G_WTM0 = 0x01, // FIFO watermark
369 FIFO_CTRL_REG_G_FM0 = 0x20, // FIFO mode config
376 // FIFO_CTRL_REG_G_WTM (FIFO watermark) is just a numeric value
380 * FIFO_CTRL_REG_G_FM values (FIFO Modes)
398 FIFO_CTRL_REG_G_FSS0 = 0x01, // FIFO stored data level
406 FIFO_CTRL_REG_G_EMPTY = 0x20, // FIFO empty
407 FIFO_CTRL_REG_G_OVRN = 0x40, // FIFO overru
[all...] |
| /cts/tests/tests/hardware/src/android/hardware/cts/ |
| SensorBatchingFifoTest.java | 32 * Checks the minimum Hardware FIFO length for each of the Hardware sensor.
33 * Further verifies if the advertised FIFO (Sensor.getFifoMaxEventCount()) is actually allocated
|
| /docs/source.android.com/src/devices/audio/ |
| avoiding_pi.jd | 207 <a href="http://en.wikipedia.org/wiki/Circular_buffer">FIFO queues</a>
230 is basically just a non-blocking single-reader single-writer FIFO
261 But with the exception of single-reader single-writer FIFO queues,
300 We have published an example non-blocking FIFO implementation that is specifically designed for
305 <li><a href="https://android.googlesource.com/platform/system/media/+/master/audio_utils/include/audio_utils/fifo.h">include/audio_utils/fifo.h</a></li>
306 <li><a href="https://android.googlesource.com/platform/system/media/+/master/audio_utils/fifo.c">fifo.c</a></li>
|
| /hardware/bsp/intel/peripheral/sensors/mraa/ |
| Sensor.hpp | 86 * Add a flush complete event to the end of the hardware FIFO for the specified sensor and flushes the FIFO
|
| /external/valgrind/coregrind/m_gdbserver/ |
| remote-utils.c | 110 /* for a gdbserver embedded in valgrind, we read from a FIFO and write
111 to another FIFO So, we need two descriptors */
130 sr_perror(o, "open fifo %s\n", path);
131 fatal ("valgrind: fatal error: vgdb FIFO cannot be opened.\n");
139 fatal("safe_fd for vgdb FIFO failed\n");
248 side of the fifo. */
285 /* we open the read side FIFO in non blocking mode
288 in non-blocking write mode succeeds only if the fifo is already
431 vgdb is ready : the other FIFO and the shared memory. */
477 reset_after_error, the FIFO will be re-opened soon. Thi
[all...] |
| /external/e2fsprogs/tests/f_orphan_dotdot_ft/ |
| expect.1 | 2 Special (device/socket/fifo) inode 12 has non-zero size. Fix? yes
|
| /external/iproute2/examples/diffserv/ |
| efcbq | 16 # packet fifo for EF?
|
| /external/libnl/include/ |
| Makefile.am | 38 netlink/route/sch/fifo.h \
|
