| /external/icu/icu4c/source/i18n/ |
| collationfastlatin.h | 157 * plus the offset the tertiary bits does not spill over into the case bits.
|
| /external/llvm/include/llvm/CodeGen/ |
| LiveIntervalAnalysis.h | 105 // Calculate the spill weight to assign to a single instruction.
|
| /external/llvm/lib/CodeGen/ |
| LocalStackSlotAllocation.cpp | 236 // Then assign frame offsets to stack objects that are not used to spill
|
| README.txt | 168 not spill slots.
|
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUTargetMachine.cpp | 301 // TODO: handle CodeGenOpt::None; fast RA ignores spill weights set by the pass
|
| /external/llvm/lib/Target/ARM/ |
| ARMCallingConv.td | 222 // Also save R7-R4 first to match the stack frame fixed spill areas.
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCRegisterInfo.td | 286 // possible because there aren't any unused spill slots.
|
| /external/llvm/lib/Target/Sparc/ |
| SparcFrameLowering.cpp | 142 // Adds the SPARC subtarget-specific spill area to the stack
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| global-extload-i16.ll | 4 ; FIXME: cypress is broken because the bigger testcases spill and it's not implemented
|
| /external/llvm/test/CodeGen/Mips/ |
| ra-allocatable.ll | 96 ; CHECK: sw $ra, {{[0-9]+}}($sp) # 4-byte Folded Spill
|
| /external/llvm/test/CodeGen/SystemZ/ |
| frame-02.ll | 5 ; This function should require all FPRs, but no other spill slots.
|
| frame-03.ll | 7 ; This function should require all FPRs, but no other spill slots.
|
| frame-07.ll | 8 ; The frame is big enough to require two emergency spill slots at 160(%r15),
|
| /external/llvm/test/CodeGen/Thumb2/ |
| large-call.ll | 6 ; emergency spill slots at [sp, #4] or [sp, #8] without adjusting the stack
|
| /external/llvm/test/CodeGen/WinEH/ |
| wineh-cloning.ll | 15 ; %x def colors: {entry} subset of use colors; must spill
|
| wineh-demotion.ll | 18 ; Spill slot should be inserted here
|
| /external/llvm/test/DebugInfo/MIR/X86/ |
| live-debug-values.mir | 190 - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, callee-saved-register: '%rbx' }
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_wm.h | 121 GLuint spill_slot:16; /* if non-zero, spill immediately after calculation */
|
| /external/mesa3d/src/mesa/program/ |
| register_allocate.c | 557 * Only nodes with a spill cost set (cost != 0.0) will be considered
|
| /external/strace/linux/xtensa/ |
| syscallent.h | 1 [ 0] = { 0, 0, SEN(printargs), "spill" },
|
| /external/v8/src/compiler/ |
| osr.cc | 331 // the first spill slots.
|
| /external/v8/test/unittests/compiler/ |
| register-allocator-unittest.cc | 641 // The spill should be performed at the position expect_spill_move.
|
| /external/valgrind/docs/internals/ |
| 3_3_BUGSTATUS.txt | 337 vx1853 vx1854 33 n-i-bz regalloc: don't incorrectly omit spill stores
|
| /external/valgrind/exp-sgcheck/docs/ |
| sg-manual.xml | 83 possibly an un-accounted for area of the stack (eg, spill slot), so
|
| /frameworks/base/tests/VoiceInteraction/res/values/ |
| strings.xml | 258 Crack nature\'s moulds, an germens spill at once,\n
|
