| /prebuilts/python/linux-x86/2.7.5/lib/python2.7/test/decimaltestdata/ |
| ddRemainderNear.decTest | 330 -- with spill... [412 exercises sticktab loop]
|
| dqRemainderNear.decTest | 330 -- with spill... [412 exercises sticktab loop]
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | [all...] |
| /external/valgrind/coregrind/m_scheduler/ |
| scheduler.c | 711 guest state, its two copies, and the spill area. In short, all 4
727 "sh2 %p %u, spill %p %u\n",
753 the spill area. */
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| stack-folding-fp-avx1.ll | 8 ; By including a nop call with sideeffects we can force a partial register spill of the
507 ;CHECK: vcvtps2ph $0, {{%xmm[0-9][0-9]*}}, {{-?[0-9]*}}(%rsp) {{.*#+}} 16-byte Folded Spill
516 ;CHECK: vcvtps2ph $0, {{%ymm[0-9][0-9]*}}, {{-?[0-9]*}}(%rsp) {{.*#+}} 16-byte Folded Spill
[all...] |
| x86-shrink-wrapping.ll | 6 ; Otherwise, we may have spill right in the entry block, defeating
|
| /external/valgrind/VEX/priv/ |
| host_arm_defs.c | 106 // r12 is used as a spill/reload temporary
113 // and r12 dedicated as a spill temporary.
[all...] |
| host_x86_defs.c | [all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| sparc-opc.c | 475 { "spill", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0), "d,[1+2]", F_ALIAS, 0, 0, v6 },
476 { "spill", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS, 0, 0, v6 }, /* st d,[rs1+%g0] */
477 { "spill", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[1+i]", F_ALIAS, 0, 0, v6 },
478 { "spill", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[i+1]", F_ALIAS, 0, 0, v6 },
479 { "spill", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0, "d,[i]", F_ALIAS, 0, 0, v6 },
480 { "spill", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0), "d,[1]", F_ALIAS, 0, 0, v6 }, /* st d,[rs1+0] */
[all...] |
| ia64-raw.tbl | 34 AR[UNAT]{%}, % in 0 - 63; IC:mov-to-AR-UNAT, st8.spill; br.ia, ld8.fill, IC:mov-from-AR-UNAT; impliedF
|
| /art/compiler/optimizing/ |
| ssa_liveness_analysis.h | [all...] |
| /external/kernel-headers/original/uapi/linux/ |
| firewire-cdev.h | 291 * A packet near the end of a buffer chunk will typically spill over into the
[all...] |
| /external/llvm/docs/ |
| Statepoints.rst | 194 # This entry describes the spill slot which is directly addressable
[all...] |
| /external/llvm/include/llvm/Analysis/ |
| TargetTransformInfo.h | 512 /// any callee-saved registers, so would require a spill and fill.
[all...] |
| /external/llvm/lib/Target/ARM/ |
| README.txt | 23 to spill these to a 8-bit or 16-bit stack slot, zero or sign extending as part
|
| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.cpp | 147 // Don't return a super-class that would shrink the spill size.
|
| /external/v8/src/ |
| flag-definitions.h | [all...] |
| /external/v8/src/ia32/ |
| macro-assembler-ia32.h | 30 // Spill slots used by interpreter dispatch calling convention.
[all...] |
| /external/v8/src/x87/ |
| macro-assembler-x87.h | 30 // Spill slots used by interpreter dispatch calling convention.
[all...] |
| /external/valgrind/massif/ |
| ms_print.in | 548 # The final snapshot will spill over into the n+1th column, which
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/linux/ |
| firewire-cdev.h | 287 * A packet near the end of a buffer chunk will typically spill over into the
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
| dv-waw-err.l | 84 .*:119: Warning: Use of 'st8\.spill' may violate WAW dependency 'AR\[UNAT\]\{%\}, % in[ ]*0[ ]+- 63' \(impliedf\)
|
| /art/compiler/utils/mips/ |
| assembler_mips.cc | 2469 ManagedRegisterSpill spill = entry_spills.at(i); local
[all...] |
| /art/compiler/utils/mips64/ |
| assembler_mips64.cc | 2007 ManagedRegisterSpill spill = entry_spills.at(i); local
[all...] |
| /art/runtime/arch/mips/ |
| quick_entrypoints_mips.S | 637 addiu $sp, $sp, -SPILL_SIZE # spill s0, s1, fp, ra and gp
763 addiu $sp, $sp, -SPILL_SIZE # spill s0, s1, fp, ra and gp
[all...] |
