HomeSort by relevance Sort by last modified time
    Searched full:addressing (Results 201 - 225 of 1179) sorted by null

1 2 3 4 5 6 7 891011>>

  /toolchain/binutils/binutils-2.25/gas/config/
m68k-parse.h 83 ZPC, /* Hack for Program space, but 0 addressing */
347 /* Is a trailing '&' added to an <ea>? (for MAC/EMAC mask addressing). */
  /toolchain/binutils/binutils-2.25/gas/doc/
c-h8300.texi 40 * H8/300-Addressing:: Addressing Modes
69 addressing).
80 @node H8/300-Addressing
81 @subsection Addressing Modes
83 @cindex addressing modes, H8/300
84 @cindex H8/300 addressing modes
85 @value{AS} understands the following addressing modes for the H8/300:
c-m68k.texi 116 If you use an addressing mode with a base register without specifying
118 For example, the addressing mode @samp{%a0@@(%d0)} is equivalent to
128 If you use an addressing mode with a displacement, and the value of the
131 been defined, @code{@value{AS}} will assemble the addressing mode
160 addressing modes are permitted. The members of the 680x0 family are
275 @cindex M680x0 addressing modes
276 @cindex addressing modes, M680x0
277 The following addressing modes are understood:
316 the Postindex addressing mode.
344 The following additional addressing modes are understood
    [all...]
c-z8k.texi 53 * Z8000-Addressing:: Addressing Modes
100 @node Z8000-Addressing
101 @subsection Addressing Modes
103 @cindex addressing modes, Z8000
104 @cindex Z800 addressing modes
105 @value{AS} understands the following addressing modes for the Z8000:
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
archv6t2-bad.l 39 [^:]*:59: Error: instruction does not accept this addressing mode -- `ldrex r0,r2'
40 [^:]*:60: Error: instruction does not accept this addressing mode -- `strex r1,r0,r2'
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/m68hc11/
indexed12.s 2 ;; This file verifies the 68HC12 indexed addressing modes
70 ;;; Indexed addressing with external symbol
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic4x/
addressing_c3x.d 3 #name: c3x addressing modes
4 #source: addressing.s
  /toolchain/binutils/binutils-2.25/gold/
aarch64-reloc-property.h 72 // Types of bases of relative addressing relocation codes.
74 // RAB_NONE, // Relocation is not relative addressing
arm-reloc-property.h 53 // Types of bases of relative addressing relocation codes.
55 RAB_NONE, // Relocation is not relative addressing
141 // is not a relative addressing relocation.
  /toolchain/binutils/binutils-2.25/include/opcode/
i386.h 96 /* index_base_byte.index for no index register addressing */
98 /* index_base_byte.base for no base register addressing */
  /external/llvm/lib/Target/MSP430/
MSP430ISelDAGToDAG.cpp 132 /// MatchWrapper - Try to match MSP430ISD::Wrapper node into an addressing mode.
136 // If the addressing mode already has a symbol as the displacement, we can
166 /// specified addressing mode without any further recursion.
241 /// SelectAddr - returns true if it is able pattern match an addressing mode.
242 /// It returns the operands which make up the maximal addressing mode it can
  /external/llvm/test/MC/SystemZ/
insn-bad-z13.s 13 #CHECK: error: invalid use of vector addressing
452 #CHECK: error: invalid use of vector addressing
467 #CHECK: error: invalid use of vector addressing
484 #CHECK: error: invalid use of vector addressing
515 #CHECK: error: invalid use of vector addressing
532 #CHECK: error: invalid use of vector addressing
549 #CHECK: error: invalid use of vector addressing
673 #CHECK: error: invalid use of vector addressing
684 #CHECK: error: invalid use of vector addressing
695 #CHECK: error: invalid use of vector addressing
    [all...]
  /art/compiler/utils/arm/
assembler_arm.cc 272 // Encoding for ARM addressing mode 3.
281 // Encoding for vfp load/store addressing.
304 return IsAbsoluteUint<8>(offset); // Addressing mode 3.
307 return IsAbsoluteUint<12>(offset); // Addressing mode 2.
310 return IsAbsoluteUint<10>(offset); // VFP addressing mode.
322 return IsAbsoluteUint<8>(offset); // Addressing mode 3.
325 return IsAbsoluteUint<12>(offset); // Addressing mode 2.
328 return IsAbsoluteUint<10>(offset); // VFP addressing mode.
345 return IsAbsoluteUint<10>(offset) && (offset & 3) == 0; // VFP addressing mode.
363 return IsAbsoluteUint<10>(offset) && (offset & 3) == 0; // VFP addressing mode
    [all...]
  /external/v8/src/arm/
constants-arm.h 184 P = 1 << 24, // Offset/pre-indexed addressing (or post-indexed addressing).
223 // Addressing modes and instruction variants.
271 // Memory operand addressing mode.
275 PreIndex = (8|4|1) << 21, // Pre-indexed addressing with writeback.
276 PostIndex = (0|4|0) << 21, // Post-indexed addressing with writeback.
283 // Load/store multiple addressing mode.
  /toolchain/binutils/binutils-2.25/opcodes/
ns32k-dis.c 349 /* Given a character C, does it represent a general addressing mode? */
360 /* Is MODE an indexed addressing mode? */
448 addressing it can be in the index byte). AOFFSETP is a pointer to the
449 bit position of the addressing extension. BUFFER contains the
453 general operand using scaled indexed addressing mode). */
809 if we are using scaled indexed addressing mode, since the index
811 of the addressing extension. */
  /external/llvm/lib/Target/SystemZ/
SystemZOperands.td 69 // Constructs an AsmOperandClass for addressing mode FORMAT, treating the
81 // Constructs an instruction operand for an addressing mode. FORMAT,
97 // Constructs both a DAG pattern and instruction operand for an addressing mode.
102 // choices for the same underlying addressing mode. SUFFIX is similarly
114 // An addressing mode with a base and displacement but no index.
120 // An addressing mode with a base, displacement and index.
136 // An addressing mode with a base, displacement and a vector index.
483 // Addressing modes
503 // DAG patterns and operands for addressing modes. Each mode has
SystemZPatterns.td 41 // respectively. MODE is the addressing mode and IMM is the type
69 // INSN stores the low 32 bits of a GPR to a memory with addressing mode MODE.
85 // INSN stores the low 32 bits of a GPR using PC-relative addressing.
  /prebuilts/go/darwin-x86/src/net/
ipsock.go 95 // ipv4only reports whether the kernel supports IPv4 addressing mode
101 // ipv6only reports whether the kernel supports IPv6 addressing mode
179 // The IPv6 scoped addressing zone identifier starts after the
  /prebuilts/go/linux-x86/src/net/
ipsock.go 95 // ipv4only reports whether the kernel supports IPv4 addressing mode
101 // ipv6only reports whether the kernel supports IPv6 addressing mode
179 // The IPv6 scoped addressing zone identifier starts after the
  /external/chromium-trace/catapult/dashboard/dashboard/
bisect_report.py 60 | X | for more information addressing perf regression bugs. For feedback,
  /external/curl/docs/libcurl/opts/
CURLOPT_RESOLVE.3 43 ADDRESS can of course be either IPv4 or IPv6 style addressing.
  /external/google-breakpad/src/third_party/libdisasm/
ia32_operand.c 45 /* ++ Do Operand Addressing Method / Decode operand ++ */
49 * A.1.1, 'Codes for Addressing Method' */
51 /* ---------------------- Addressing Method -------------- */
57 * Some Intel addressing methods [M, R] specify that modR/M
  /external/gptfdisk/
mbrpart.h 38 // Note that firstSector and lastSector are in CHS addressing, which
  /external/iproute2/man/man8/
tipc-bearer.8 149 The addressing domain (region) in which a bearer will establish links and accept
  /external/libchrome/sandbox/win/src/sidestep/
mini_disassembler.cpp 206 // Decide what to do based on the addressing mode.
208 // No ModR/M byte indicated by these addressing modes, and no
231 // In these addressing modes, there is a ModR/M byte and it needs to be
244 // These addressing modes specify an immediate or an offset value

Completed in 4318 milliseconds

1 2 3 4 5 6 7 891011>>