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  /external/v8/src/mips/
constants-mips.h 343 ANDI = ((1U << 3) + 4) << kOpcodeShift,
895 OpcodeToBitNumber(ANDI) | OpcodeToBitNumber(ORI) |
    [all...]
disasm-mips.cc     [all...]
  /external/v8/src/mips64/
constants-mips64.h 327 ANDI = ((1U << 3) + 4) << kOpcodeShift,
941 OpcodeToBitNumber(SLTIU) | OpcodeToBitNumber(ANDI) |
    [all...]
  /external/valgrind/VEX/priv/
host_mips_isel.c     [all...]
  /external/valgrind/coregrind/
m_syscall.c 515 " andi. 3,3,1\n"
553 " andi. 3,3,1\n"
    [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
msa.s 465 andi.b $w9,$w10,0
466 andi.b $w11,$w12,255
  /art/compiler/utils/mips64/
assembler_mips64.h 143 void Andi(GpuRegister rt, GpuRegister rs, uint16_t imm16);
  /art/disassembler/
disassembler_mips.cc 217 { kITypeMask, 12 << kOpcodeShift, "andi", "TSi", },
  /development/ndk/platforms/android-9/arch-mips/include/asm/sibyte/
sb1250_scd.h 119 #define SYS_SOC_TYPE(dest, sysrev) .set push ; .set reorder ; dsrl dest, sysrev, S_SYS_SOC_TYPE ; andi dest, dest, (M_SYS_SOC_TYPE >> S_SYS_SOC_TYPE); beq dest, K_SYS_SOC_TYPE_BCM1250_ALT, 991f ; beq dest, K_SYS_SOC_TYPE_BCM1250_ALT2, 991f ; b 992f ; 991: li dest, K_SYS_SOC_TYPE_BCM1250 ; 992: .set pop
  /external/curl/docs/
THANKS 62 Andi Jahja
  /external/llvm/test/MC/Disassembler/Mips/micromips32r6/
valid.txt 39 0xd0 0x64 0x04 0xd2 # CHECK: andi $3, $4, 1234
  /external/llvm/test/MC/Disassembler/Mips/mips2/
valid-mips2.txt 98 0x30 0x42 0x00 0x04 # CHECK: andi $2, $2, 4
  /external/llvm/test/MC/Disassembler/Mips/mips3/
valid-mips3-el.txt 15 0x04 0x00 0x42 0x30 # CHECK: andi $2, $2, 4
valid-mips3.txt 129 0x30 0x42 0x00 0x04 # CHECK: andi $2, $2, 4
  /external/llvm/test/MC/Disassembler/Mips/mips32/
valid-mips32-el.txt 13 0x67 0x45 0xc9 0x30 # CHECK: andi $9, $6, 17767
  /external/llvm/test/MC/Disassembler/Mips/mips32r2/
valid-mips32r2-el.txt 14 0x67 0x45 0xc9 0x30 # CHECK: andi $9, $6, 17767
  /external/llvm/test/MC/Disassembler/Mips/mips32r3/
valid-mips32r3-el.txt 11 0x67 0x45 0xc9 0x30 # CHECK: andi $9, $6, 17767
  /external/llvm/test/MC/Disassembler/Mips/mips32r5/
valid-mips32r5-el.txt 11 0x67 0x45 0xc9 0x30 # CHECK: andi $9, $6, 17767
  /external/llvm/test/MC/Disassembler/Mips/mips32r6/
valid-mips32r6.txt 53 0x30 0x42 0x00 0x04 # CHECK: andi $2, $2, 4
  /external/llvm/test/MC/Disassembler/Mips/mips4/
valid-mips4-el.txt 15 0x04 0x00 0x42 0x30 # CHECK: andi $2, $2, 4
  /external/llvm/test/MC/Disassembler/Mips/mips64r3/
valid-mips64r3-el.txt 12 0x67 0x45 0xc9 0x30 # CHECK: andi $9, $6, 17767
  /external/llvm/test/MC/Disassembler/Mips/mips64r5/
valid-mips64r5-el.txt 12 0x67 0x45 0xc9 0x30 # CHECK: andi $9, $6, 17767
  /external/llvm/test/MC/Disassembler/Mips/mips64r6/
valid-mips64r6-el.txt 6 0x04 0x00 0x42 0x30 # CHECK: andi $2, $2, 4
valid-mips64r6.txt 70 0x30 0x42 0x00 0x04 # CHECK: andi $2, $2, 4
  /external/llvm/test/MC/Disassembler/PowerPC/
ppc64-encoding.txt 433 # CHECK: andi. 2, 3, 128

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