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  /external/llvm/test/MC/Mips/mips64r3/
valid.s 18 and $2,4 # CHECK: andi $2, $2, 4 # encoding: [0x30,0x42,0x00,0x04]
  /external/llvm/test/MC/Mips/mips64r5/
valid.s 18 and $2,4 # CHECK: andi $2, $2, 4 # encoding: [0x30,0x42,0x00,0x04]
  /external/llvm/test/MC/Mips/mips64r6/
valid.s 22 and $2,4 # CHECK: andi $2, $2, 4 # encoding: [0x30,0x42,0x00,0x04]
  /external/mesa3d/src/gallium/auxiliary/rtasm/
rtasm_ppc.c 895 emit_d(p, 28, ra, rt, imm, "andi\tr%u, r%u, %d\n", FALSE);
  /external/v8/src/ppc/
disasm-ppc.cc 1237 Format(instr, "andi. 'ra, 'rs, 'uint16");
    [all...]
  /prebuilts/go/darwin-x86/pkg/bootstrap/src/bootstrap/link/internal/ppc64/
asm.go 434 28: // andi
  /prebuilts/go/darwin-x86/src/cmd/link/internal/ppc64/
asm.go 431 28: // andi
  /prebuilts/go/linux-x86/pkg/bootstrap/src/bootstrap/link/internal/ppc64/
asm.go 434 28: // andi
  /prebuilts/go/linux-x86/src/cmd/link/internal/ppc64/
asm.go 431 28: // andi
  /toolchain/binutils/binutils-2.25/gas/config/
tc-iq2000.c 171 andi \\rt,\\rs,%lo(\\imm)\n\
  /toolchain/binutils/binutils-2.25/opcodes/
ChangeLog-2011 230 "and", "andi", "beq", "beqz", "bne", "bnez", "di", "ei", "j",
mt-opc.c 337 /* andi $frdr,$frsr1,#$imm16z */
    [all...]
or1k-opc.c 479 /* l.andi $rD,$rA,$uimm16 */
nds32-asm.c 246 {"andi", "=rt,%ra,%i15u", OP6 (ANDI), 4, ATTR_ALL, 0, NULL, 0, NULL},
    [all...]
or1k-desc.c     [all...]
  /art/runtime/arch/mips/
quick_entrypoints_mips.S     [all...]
  /external/llvm/test/CodeGen/Mips/msa/
bitwise.ll 74 ; CHECK-DAG: andi.b [[R4:\$w[0-9]+]], [[R1]], 1
    [all...]
  /external/v8/src/mips/
assembler-mips.cc 673 return GetOpcodeField(instr) == ANDI;
1619 void Assembler::andi(Register rt, Register rs, int32_t j) { function in class:v8::internal::Assembler
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  /external/v8/src/mips64/
assembler-mips64.cc 641 return GetOpcodeField(instr) == ANDI;
1747 void Assembler::andi(Register rt, Register rs, int32_t j) { function in class:v8::internal::Assembler
    [all...]
  /external/v8/src/full-codegen/ppc/
full-codegen-ppc.cc     [all...]
  /external/valgrind/VEX/priv/
host_mips_defs.c 694 ret = immR ? "andi" : "and";
    [all...]
  /external/llvm/lib/Target/Mips/
MicroMipsInstrInfo.td 678 def ANDi_MM : MMRel, ArithLogicI<"andi", uimm16, GPR32Opnd>,
    [all...]
Mips64InstrInfo.td 110 def ANDi64 : ArithLogicI<"andi", uimm16_64, GPR64Opnd, II_AND, immZExt16, and>,
MipsSEFrameLowering.cpp 517 // andi $sp, $sp, $Reg
    [all...]
  /external/v8/src/compiler/mips/
code-generator-mips.cc     [all...]

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