| /external/llvm/lib/Target/ARM/ |
| Thumb1FrameLowering.cpp | 494 BitVector PopFriendly =
499 BitVector GPRsNoLRSP =
|
| /prebuilts/gcc/darwin-x86/aarch64/aarch64-linux-android-4.9/lib/gcc/aarch64-linux-android/4.9/gcov-src/ |
| gcov-io.h | 142 histogram: {int32:bitvector}8 histogram-buckets*
145 zero_fixup: int32:num int32:bitvector*
|
| /prebuilts/gcc/darwin-x86/arm/arm-linux-androideabi-4.9/lib/gcc/arm-linux-androideabi/4.9/gcov-src/ |
| gcov-io.h | 142 histogram: {int32:bitvector}8 histogram-buckets*
145 zero_fixup: int32:num int32:bitvector*
|
| /prebuilts/gcc/darwin-x86/mips/mips64el-linux-android-4.9/lib/gcc/mips64el-linux-android/4.9/gcov-src/ |
| gcov-io.h | 142 histogram: {int32:bitvector}8 histogram-buckets*
145 zero_fixup: int32:num int32:bitvector*
|
| /prebuilts/gcc/darwin-x86/x86/x86_64-linux-android-4.9/lib/gcc/x86_64-linux-android/4.9/gcov-src/ |
| gcov-io.h | 142 histogram: {int32:bitvector}8 histogram-buckets*
145 zero_fixup: int32:num int32:bitvector*
|
| /prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/lib/gcc/aarch64-linux-android/4.9/gcov-src/ |
| gcov-io.h | 142 histogram: {int32:bitvector}8 histogram-buckets*
145 zero_fixup: int32:num int32:bitvector*
|
| /prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.9/lib/gcc/arm-linux-androideabi/4.9/gcov-src/ |
| gcov-io.h | 142 histogram: {int32:bitvector}8 histogram-buckets*
145 zero_fixup: int32:num int32:bitvector*
|
| /prebuilts/gcc/linux-x86/mips/mips64el-linux-android-4.9/lib/gcc/mips64el-linux-android/4.9/gcov-src/ |
| gcov-io.h | 142 histogram: {int32:bitvector}8 histogram-buckets*
145 zero_fixup: int32:num int32:bitvector*
|
| /prebuilts/gcc/linux-x86/x86/x86_64-linux-android-4.9/lib/gcc/x86_64-linux-android/4.9/gcov-src/ |
| gcov-io.h | 142 histogram: {int32:bitvector}8 histogram-buckets*
145 zero_fixup: int32:num int32:bitvector*
|
| /external/llvm/utils/TableGen/ |
| CodeGenRegisters.cpp | [all...] |
| /prebuilts/go/darwin-x86/src/reflect/ |
| type.go | [all...] |
| /prebuilts/go/linux-x86/src/reflect/ |
| type.go | [all...] |
| /external/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | 31 class BitVector;
339 BitVector getAllocatableSet(const MachineFunction &MF,
471 virtual BitVector getReservedRegs(const MachineFunction &MF) const = 0;
[all...] |
| /external/llvm/lib/CodeGen/ |
| PrologEpilogInserter.cpp | 87 const BitVector &SavedRegs);
182 BitVector SavedRegs;
294 const BitVector &SavedRegs) {
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCRegisterInfo.cpp | 22 #include "llvm/ADT/BitVector.h"
165 BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
166 BitVector Reserved(getNumRegs());
[all...] |
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyPEI.cpp | 96 const BitVector &SavedRegs);
197 BitVector SavedRegs;
310 const BitVector &SavedRegs) {
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.cpp | 22 #include "llvm/ADT/BitVector.h"
393 BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
394 BitVector Reserved(getNumRegs());
|
| /art/compiler/optimizing/ |
| register_allocator.cc | 511 BitVector* liveness_of_spill_slot = liveness_of_values[number_of_registers
535 BitVector* liveness_of_register = liveness_of_values[current->GetRegister()];
[all...] |
| /art/runtime/ |
| oat_file.h | 36 class BitVector;
|
| /external/chromium-trace/catapult/third_party/coverage/ |
| TODO.txt | 106 - bitvector in trace extension.
|
| /external/compiler-rt/lib/sanitizer_common/ |
| sanitizer_deadlock_detector.h | 140 typedef BV BitVector;
|
| /external/llvm/lib/Target/AMDGPU/ |
| SIInstrInfo.h | 438 void reserveIndirectRegisters(BitVector &Reserved,
|
| /external/llvm/lib/Target/Sparc/ |
| SparcFrameLowering.cpp | 359 BitVector &SavedRegs,
|
| /external/llvm/test/CodeGen/PowerPC/ |
| pr15031.ll | 198 %"class.llvm::MachineRegisterInfo" = type { %"class.llvm::TargetRegisterInfo"*, i8, i8, %"class.llvm::IndexedMap", %"class.llvm::IndexedMap.146", %"class.llvm::MachineOperand"**, %"class.llvm::BitVector", %"class.llvm::BitVector", %"class.llvm::BitVector", %"class.std::vector.147", %"class.std::vector.123" }
218 %"class.llvm::BitVector" = type { i64*, i32, i32 }
[all...] |
| /external/v8/src/compiler/ |
| scheduler.cc | 674 BitVector* members;
[all...] |
