| /external/llvm/lib/Target/Mips/ |
| MipsDelaySlotFiller.cpp | 18 #include "llvm/ADT/BitVector.h"
89 bool checkRegDefsUses(BitVector &NewDefs, BitVector &NewUses, unsigned Reg,
93 bool isRegInSet(const BitVector &RegSet, unsigned Reg) const;
96 BitVector Defs, Uses;
327 BitVector CallerSavedRegs(TRI.getNumRegs(), true);
341 BitVector AllocSet = TRI.getAllocatableSet(MF);
363 BitVector NewDefs(TRI.getNumRegs()), NewUses(TRI.getNumRegs());
379 bool RegDefsUses::checkRegDefsUses(BitVector &NewDefs, BitVector &NewUses
[all...] |
| /external/clang/include/clang/Analysis/Analyses/ |
| ReachableCode.h | 24 class BitVector;
62 llvm::BitVector &Reachable);
|
| /external/clang/lib/Analysis/ |
| ReachableCode.cpp | 25 #include "llvm/ADT/BitVector.h"
268 llvm::BitVector &Reachable,
335 llvm::BitVector &Reachable) {
345 llvm::BitVector Visited;
346 llvm::BitVector &Reachable;
356 DeadCodeScan(llvm::BitVector &reachable, Preprocessor &PP)
633 llvm::BitVector &Reachable) {
646 llvm::BitVector reachable(cfg->getNumBlockIDs());
|
| CFGReachabilityAnalysis.cpp | 44 llvm::BitVector visited(analyzed.size());
|
| /external/llvm/include/llvm/ADT/ |
| PackedVector.h | 17 #include "llvm/ADT/BitVector.h"
74 template <typename T, unsigned BitNum, typename BitVectorTy = BitVector>
|
| /external/llvm/include/llvm/CodeGen/ |
| RegisterClassInfo.h | 21 #include "llvm/ADT/BitVector.h"
62 BitVector Reserved;
|
| /external/llvm/lib/CodeGen/ |
| LiveRegMatrix.cpp | 142 // The same BitVector can be reused for all PhysRegs.
151 // The BitVector is indexed by PhysReg, not register unit.
|
| TargetRegisterInfo.cpp | 14 #include "llvm/ADT/BitVector.h"
155 const TargetRegisterClass *RC, BitVector &R){
162 BitVector TargetRegisterInfo::getAllocatableSet(const MachineFunction &MF,
164 BitVector Allocatable(getNumRegs());
178 BitVector Reserved = getReservedRegs(MF);
|
| StackColoring.cpp | 25 #include "llvm/ADT/BitVector.h"
93 /// Each bit in the BitVector represents the liveness property
97 BitVector Begin;
99 BitVector End;
101 BitVector LiveIn;
103 BitVector LiveOut;
308 BitVector LocalLiveIn;
309 BitVector LocalLiveOut;
346 BitVector LocalEndBegin = BlockInfo.End;
|
| /external/llvm/lib/Target/AMDGPU/ |
| SIRegisterInfo.h | 28 void reserveRegisterTuples(BitVector &, unsigned Reg) const;
42 BitVector getReservedRegs(const MachineFunction &MF) const override;
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZRegisterInfo.cpp | 36 BitVector
38 BitVector Reserved(getNumRegs());
|
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyRegisterInfo.cpp | 45 BitVector
47 BitVector Reserved(getNumRegs());
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600RegisterInfo.cpp | 27 BitVector R600RegisterInfo::getReservedRegs(const MachineFunction &MF) const
29 BitVector Reserved(getNumRegs());
|
| /prebuilts/go/darwin-x86/src/reflect/ |
| makefunc.go | 17 stack *bitVector // stack bitmap for args - offset known to runtime
75 stack *bitVector // stack bitmap for args - offset known to runtime
|
| /prebuilts/go/darwin-x86/src/runtime/ |
| heapdump.go | 197 func dumpobj(obj unsafe.Pointer, size uintptr, bv bitvector) {
225 args bitvector // if args.n >= 0, pointer map of args region
231 func dumpbv(cbv *bitvector, offset uintptr) {
263 var bv bitvector
690 func dumpfields(bv bitvector) {
702 func dumpbvtypes(bv *bitvector, base unsafe.Pointer) {
705 func makeheapobjbv(p uintptr, size uintptr) bitvector {
734 return bitvector{int32(i), &tmpbuf[0]}
|
| /prebuilts/go/linux-x86/src/reflect/ |
| makefunc.go | 17 stack *bitVector // stack bitmap for args - offset known to runtime
75 stack *bitVector // stack bitmap for args - offset known to runtime
|
| /prebuilts/go/linux-x86/src/runtime/ |
| heapdump.go | 197 func dumpobj(obj unsafe.Pointer, size uintptr, bv bitvector) {
225 args bitvector // if args.n >= 0, pointer map of args region
231 func dumpbv(cbv *bitvector, offset uintptr) {
263 var bv bitvector
690 func dumpfields(bv bitvector) {
702 func dumpbvtypes(bv *bitvector, base unsafe.Pointer) {
705 func makeheapobjbv(p uintptr, size uintptr) bitvector {
734 return bitvector{int32(i), &tmpbuf[0]}
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonBitSimplify.cpp | 33 // Set of virtual registers, based on BitVector.
34 struct RegisterSet : private BitVector {
35 RegisterSet() : BitVector() {}
36 explicit RegisterSet(unsigned s, bool t = false) : BitVector(s, t) {}
37 RegisterSet(const RegisterSet &RS) : BitVector(RS) {}
39 using BitVector::clear;
40 using BitVector::count;
43 int First = BitVector::find_first();
50 int Next = BitVector::find_next(v2x(Prev));
59 return static_cast<RegisterSet&>(BitVector::set(Idx))
[all...] |
| HexagonGenInsert.cpp | 14 #include "llvm/ADT/BitVector.h"
78 // Set of virtual registers, based on BitVector.
79 struct RegisterSet : private BitVector {
81 explicit RegisterSet(unsigned s, bool t = false) : BitVector(s, t) {}
83 using BitVector::clear;
86 int First = BitVector::find_first();
93 int Next = BitVector::find_next(v2x(Prev));
102 return static_cast<RegisterSet&>(BitVector::set(Idx));
108 return static_cast<RegisterSet&>(BitVector::reset(Idx));
112 return static_cast<RegisterSet&>(BitVector::operator|=(Rs))
[all...] |
| /art/compiler/optimizing/ |
| ssa_liveness_analysis.cc | 179 BitVector* live_in) {
215 BitVector* kill = GetKillSet(*block);
216 BitVector* live_in = GetLiveInSet(*block);
348 BitVector* live_out = GetLiveOutSet(block);
361 BitVector* live_out = GetLiveOutSet(block);
362 BitVector* kill = GetKillSet(block);
363 BitVector* live_in = GetLiveInSet(block);
|
| liveness_test.cc | 34 static void DumpBitVector(BitVector* vector,
63 BitVector* live_in = liveness.GetLiveInSet(*block);
65 BitVector* live_out = liveness.GetLiveOutSet(*block);
67 BitVector* kill = liveness.GetKillSet(*block);
|
| stack_map_stream.cc | 23 BitVector* sp_mask,
189 const BitVector* live_dex_registers_mask) const {
395 const BitVector& live_dex_registers_mask,
474 BitVector* live_dex_registers_mask,
|
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| DbgValueHistoryCalculator.cpp | 11 #include "llvm/ADT/BitVector.h"
171 BitVector &Regs) {
187 BitVector ChangingRegs(TRI->getNumRegs());
|
| /external/llvm/lib/Target/Sparc/ |
| SparcRegisterInfo.cpp | 18 #include "llvm/ADT/BitVector.h"
55 BitVector SparcRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
56 BitVector Reserved(getNumRegs());
|
| /external/llvm/lib/Target/XCore/ |
| XCoreRegisterInfo.cpp | 19 #include "llvm/ADT/BitVector.h"
231 BitVector XCoreRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
232 BitVector Reserved(getNumRegs());
|
