/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.h | 165 CBZ,
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AArch64BranchRelaxation.cpp | 38 CBZDisplacementBits("aarch64-cbz-offset-bits", cl::Hidden, cl::init(19),
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AArch64InstrInfo.cpp | 371 // Expanding cbz/tbz requires an extra cycle of latency on the condition. 416 case 3: { // cbz/cbnz [all...] |
/external/llvm/test/CodeGen/ARM/ |
sjlj-prepare-critical-edge.ll | 82 ; CHECK: cbz [[R0]]
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/external/v8/src/arm64/ |
macro-assembler-arm64.cc | 742 case reg_zero: Cbz(reg, label); break; 813 cbz(rt, &done); 822 void MacroAssembler::Cbz(const Register& rt, Label* label) { 833 cbz(rt, label); [all...] |
builtins-arm64.cc | 155 __ Cbz(x0, &no_arguments); 191 __ Cbz(x0, &no_arguments); 256 __ Cbz(x0, &no_arguments); 317 __ Cbz(x0, &no_arguments); [all...] |
assembler-arm64.cc | 1018 void Assembler::cbz(const Register& rt function in class:v8::internal::Assembler 1025 void Assembler::cbz(const Register& rt, function in class:v8::internal::Assembler [all...] |
constants-arm64.h | 623 CBZ = CBZ_w, [all...] |
/art/compiler/utils/arm/ |
assembler_arm32.cc | 1626 void Arm32Assembler::cbz(Register rn ATTRIBUTE_UNUSED, Label* target ATTRIBUTE_UNUSED) { function in class:art::arm::Arm32Assembler [all...] |
assembler_thumb2.cc | 3199 void Thumb2Assembler::cbz(Register rn, Label* label) { function in class:art::arm::Thumb2Assembler [all...] |
/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMAsmBackend.cpp | 226 // If we have a Thumb CBZ or CBNZ instruction and its target is the next 258 // If we are changing Thumb CBZ or CBNZ instruction to a NOP, aka tHINT, we [all...] |
/external/v8/src/compiler/arm64/ |
code-generator-arm64.cc | 886 // Pseudo instruction turned into cbz/cbnz in AssembleArchBranch. [all...] |
/art/compiler/dex/ |
compiler_enums.h | 646 kFixupCBxZ, // Cbz, Cbnz.
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/art/compiler/utils/arm64/ |
assembler_arm64.cc | 606 ___ Cbz(reg_x(in_reg.AsXRegister()), &exit);
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/external/v8/test/cctest/ |
test-disasm-arm64.cc | [all...] |
test-assembler-arm64.cc | [all...] |
/external/vixl/doc/ |
supported-instructions.md | 233 ### CBZ ### 237 void cbz(const Register& rt, int imm19) 240 ### CBZ ### 244 void cbz(const Register& rt, Label* label) [all...] |
/external/vixl/src/vixl/a64/ |
macro-assembler-a64.cc | 496 case reg_zero: Cbz(reg, label); break; 541 cbz(rt, &done); 555 void MacroAssembler::Cbz(const Register& rt, Label* label) { 571 cbz(rt, label); [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
thumb32.s | 270 cbz r5, 1f
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/external/v8/src/crankshaft/arm64/ |
lithium-codegen-arm64.cc | 74 // converting the comparison to Cbz/Cbnz if the right-hand side is 0. 431 __ Cbz(x10, &packed_case); [all...] |
/art/compiler/optimizing/ |
intrinsics_arm.cc | [all...] |
/external/llvm/test/MC/AArch64/ |
basic-a64-diagnostics.s | [all...] |
/external/pcre/dist/sljit/ |
sljitNativeARM_64.c | 77 #define CBZ 0xb4000000 [all...] |
/external/llvm/test/CodeGen/AArch64/ |
arm64-xaluo.ll | 629 ; CHECK-NEXT: {{cbz|cmp}}
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/frameworks/rs/cpu_ref/ |
rsCpuIntrinsics_advsimd_Blend.S | 602 cbz x6, 1f
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