/external/llvm/test/Object/ |
no-section-header-string-table.test | 4 CHECK: Type: SHT_PROGBITS (0x1) 5 CHECK: Type: SHT_PROGBITS (0x1) 6 CHECK: Type: SHT_PROGBITS (0x1) 7 CHECK: Type: SHT_RELA (0x4) 8 CHECK: Type: SHT_SYMTAB (0x2) 9 CHECK: Type: SHT_STRTAB (0x3) 10 CHECK: Type: SHT_STRTAB (0x3)
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nm-irix6.test | 0 # Check reading IRIX 6.0 64-bit archive file. 4 CHECK: f1.o: 5 CHECK-NEXT: 00000028 T f1 6 CHECK-NEXT: 00000000 d s_d 7 CHECK-NEXT: 00000000 t s_foo 9 CHECK: f2.o: 10 CHECK-NEXT: 00000028 T f2 11 CHECK-NEXT: 00000000 d s_d 12 CHECK-NEXT: 00000000 t s_foo 14 CHECK: f3.o [all...] |
/external/clang/test/CodeGenCXX/ |
cxx0x-initializer-array.cpp | 3 // CHECK: @[[THREE_NULL_MEMPTRS:.*]] = private constant [3 x i32] [i32 -1, i32 -1, i32 -1] 9 // CHECK-LABEL: define i32 @_Z1fv 10 // CHECK: store i32 1 36 // CHECK-LABEL: define void @_ZN22ValueInitArrayOfMemPtr1fEi 39 // CHECK: store i32 -1, 42 // CHECK: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %{{.*}}, i8* bitcast ([3 x i32]* @[[THREE_NULL_MEMPTRS]] to i8*), i32 12, i32 4, i1 false) 46 // CHECK-LABEL: define void @_ZN22ValueInitArrayOfMemPtr1gEMNS_1SEi 48 // CHECK: store i32 -1, 58 // CHECK-LABEL: define void @_ZN10array_dtor1gEv( 60 // CHECK: %[[ARRAY:.*]] = alloca [3 [all...] |
reference-cast.cpp | 6 // CHECK: define dereferenceable({{[0-9]+}}) i32* @_Z16lvalue_noop_castv() [[NUW:#[0-9]+]] 9 // CHECK: store i32 17, i32* 12 // CHECK: store i32 17, i32* 14 // CHECK: store i32 17, i32* 18 // CHECK-LABEL: define dereferenceable({{[0-9]+}}) i16* @_Z20lvalue_integral_castv() 21 // CHECK: store i16 17, i16* 24 // CHECK: store i16 17, i16* 26 // CHECK: store i16 17, i16* 30 // CHECK-LABEL: define dereferenceable({{[0-9]+}}) i16* @_Z29lvalue_floating_integral_castv() 33 // CHECK: store i16 17, i16 [all...] |
/external/llvm/test/CodeGen/SystemZ/ |
int-const-02.ll | 7 ; Check 0. 9 ; CHECK-LABEL: f1: 10 ; CHECK: lghi %r2, 0 11 ; CHECK-NEXT: br %r14 15 ; Check the high end of the LGHI range. 17 ; CHECK-LABEL: f2: 18 ; CHECK: lghi %r2, 32767 19 ; CHECK-NEXT: br %r14 23 ; Check the next value up, which must use LLILL instead. 25 ; CHECK-LABEL: f3 [all...] |
/external/llvm/test/MC/Disassembler/ARM/ |
unpredictable-AExtI-arm.txt | 1 # RUN: llvm-mc --disassemble %s -triple=armv7-linux-gnueabi 2>&1 | FileCheck %s -check-prefix=CHECK-WARN 4 # CHECK-WARN: potentially undefined 5 # CHECK-WARN: 0x74 0x03 0xaf 0x06 6 # CHECK: sxtb 9 # CHECK-WARN: potentially undefined 10 # CHECK-WARN: 0x74 0x3f 0xbf 0x06 11 # CHECK: sxth 14 # CHECK-WARN: potentially undefined 15 # CHECK-WARN: 0x74 0x3f 0xa6 0x0 [all...] |
/external/clang/test/Misc/ |
ast-dump-decl.cpp | 1 // RUN: %clang_cc1 -std=c++11 -triple x86_64-linux-gnu -fms-extensions -ast-dump -ast-dump-filter Test %s | FileCheck -check-prefix CHECK -strict-whitespace %s 7 // CHECK: EnumDecl{{.*}} class TestEnumDeclScoped 'int' 8 // CHECK: EnumDecl{{.*}} TestEnumDeclFixed 'int' 13 // CHECK: FieldDecl{{.*}} TestFieldDeclInit 'int' 14 // CHECK-NEXT: IntegerLiteral 23 // CHECK: VarDecl{{.*}} TestVarDeclNRVO 'class testVarDeclNRVO::A' nrvo 26 // CHECK: ParmVarDecl{{.*}} TestParmVarDeclInit 'int' 27 // CHECK-NEXT: IntegerLiteral{{.*}} 32 // CHECK: NamespaceDecl{{.*}} TestNamespaceDec [all...] |
/external/llvm/test/MC/ARM/ |
ldr-pseudo-darwin.s | 12 @ Check that large constants are converted to ldr from constant pool 16 @ CHECK-LABEL: f3: 19 @ CHECK: ldr r0, Ltmp0 23 @ CHECK-LABEL: f4: 26 @ CHECK: ldr r0, Ltmp1 32 @ CHECK: ldr r0, Ltmp2 38 @ CHECK-LABEL: f5: 41 @ CHECK: ldr r0, Ltmp3 50 @ CHECK: ldr r0, Ltmp4 60 @ CHECK-LABEL: f6 [all...] |
directive-arch-armv4.s | 3 @ This test case will check the default .ARM.attributes value for the 7 @ RUN: | FileCheck %s -check-prefix CHECK-ASM 9 @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR 14 @ CHECK-ASM: .arch armv4 16 @ CHECK-ATTR: FileAttributes { 17 @ CHECK-ATTR: Attribute { 18 @ CHECK-ATTR: TagName: CPU_name 19 @ CHECK-ATTR: Value: [all...] |
directive-eabi_attribute-diagnostics.s | 8 @ CHECK: error: attribute name not recognised: Tag_unknown_name 9 @ CHECK: .eabi_attribute Tag_unknown_name 10 @ CHECK: ^ 13 @ CHECK: error: expected numeric constant 14 @ CHECK: .eabi_attribute [non_constant_expression], 0 15 @ CHECK: ^ 18 @ CHECK: error: expected numeric constant 19 @ CHECK: .eabi_attribute 42, "forty two" 20 @ CHECK: ^ 23 @ CHECK: error: bad string constan [all...] |
/external/llvm/test/CodeGen/PowerPC/ |
recipest.ll | 2 ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -enable-unsafe-fp-math -mattr=-vsx -recip=sqrtf:0,sqrtd:0 | FileCheck %s -check-prefix=CHECK-NONR 3 ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck -check-prefix=CHECK-SAFE %s 16 ; CHECK: @foo 17 ; CHECK-DAG: frsqrte 18 ; CHECK-DAG: fnmsub 19 ; CHECK: fmul 20 ; CHECK-NEXT: fmadd 21 ; CHECK-NEXT: fmu [all...] |
/external/clang/test/CodeGen/ |
aarch64-neon-vget.c | 8 // CHECK-LABEL: test_vget_lane_u8: 9 // CHECK-NEXT: umov.b w0, v0[7] 10 // CHECK-NEXT: ret 15 // CHECK-LABEL: test_vget_lane_u16: 16 // CHECK-NEXT: umov.h w0, v0[3] 17 // CHECK-NEXT: ret 22 // CHECK-LABEL: test_vget_lane_u32: 23 // CHECK-NEXT: mov.s w0, v0[1] 24 // CHECK-NEXT: ret 29 // CHECK-LABEL: test_vget_lane_s8 [all...] |
/external/llvm/test/MC/AArch64/ |
ldr-pseudo.s | 4 // Check that large constants are converted to ldr from constant pool 8 // CHECK-LABEL: f1: 11 // CHECK: movz x0, #0x1234 13 // CHECK: movz w1, #0x4567 15 // CHECK: movz x0, #0x1234, lsl #16 17 // CHECK: movz w1, #0x4567, lsl #16 19 // CHECK: movz x0, #0xabc, lsl #32 21 // CHECK: movz x0, #0xbeef, lsl #48 24 // CHECK-LABEL: f3: 27 // CHECK: ldr w0, .Ltmp[[TMP0:[0-9]+] [all...] |
/external/clang/test/Index/ |
complete-property-flags.m | 10 // RUN: c-index-test -code-completion-at=%s:7:11 %s -fobjc-runtime=macosx-10.4 -fno-objc-arc | FileCheck -check-prefix=CHECK-CC1 -check-prefix=CHECK-CC1-NOWEAK %s 11 // RUN: c-index-test -code-completion-at=%s:7:11 %s -fobjc-runtime=macosx-10.8 -Xclang -fobjc-weak -fno-objc-arc | FileCheck -check-prefix=CHECK-CC1 -check-prefix=CHECK-CC1-WEAK %s 12 // CHECK-CC1: {TypedText assign} 13 // CHECK-CC1-NEXT: {TypedText atomic [all...] |
/external/llvm/test/CodeGen/X86/ |
divrem8_ext.ll | 1 ; RUN: llc -march=x86-64 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-64 2 ; RUN: llc -march=x86 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-32 7 ; CHECK-LABEL: test_udivrem_zext_ah 8 ; CHECK: div [all...] |
pr5145.ll | 5 ; CHECK: atomic_maxmin_i8 7 ; CHECK: [[LABEL1:\.?LBB[0-9]+_[0-9]+]]: 8 ; CHECK: movsbl 9 ; CHECK: cmpl 10 ; CHECK: lock cmpxchgb 11 ; CHECK: jne [[LABEL1]] 13 ; CHECK: [[LABEL3:\.?LBB[0-9]+_[0-9]+]]: 14 ; CHECK: movsbl 15 ; CHECK: cmpl 16 ; CHECK: lock cmpxchg [all...] |
/external/llvm/test/MC/ELF/ |
common.s | 11 // CHECK: Symbol { 12 // CHECK: Name: common1 13 // CHECK-NEXT: Value: 0x0 14 // CHECK-NEXT: Size: 1 15 // CHECK-NEXT: Binding: Local 16 // CHECK-NEXT: Type: Object 17 // CHECK-NEXT: Other: 0 18 // CHECK-NEXT: Section: 19 // CHECK-NEXT: } 27 // CHECK: Symbol [all...] |
/external/llvm/test/CodeGen/NVPTX/ |
shift-parts.ll | 3 ; CHECK: shift_parts_left_128 5 ; CHECK: shl.b64 6 ; CHECK: mov.u32 7 ; CHECK: sub.s32 8 ; CHECK: shr.u64 9 ; CHECK: or.b64 10 ; CHECK: add.s32 11 ; CHECK: shl.b64 12 ; CHECK: setp.gt.s32 13 ; CHECK: selp.b6 [all...] |
/external/llvm/test/DebugInfo/ |
dwarfdump-debug-loc-simple.test | 4 CHECK: .debug_info 5 CHECK: DW_AT_name{{.*}}"f" 6 CHECK: DW_AT_location{{.*}}([[F_LOC:0x[0-9a-f]*]]) 7 CHECK: DW_AT_name{{.*}}"g" 8 CHECK: DW_AT_location{{.*}}([[G_LOC:0x[0-9a-f]*]]) 9 CHECK: .debug_loc contents: 10 CHECK-NEXT: [[F_LOC]]: Beginning address offset: 0x0000000000000000 11 CHECK-NEXT: Ending address offset: 0x0000000000000023 14 CHECK-NEXT: Location description: 51 15 CHECK-NEXT: {{^$} [all...] |
/external/llvm/test/MC/Mips/ |
mips-cop0-reginfo.s | 3 # RUN: FileCheck %s -check-prefix=CHECK 10 # CHECK: Section { 11 # CHECK: Index: 5 12 # CHECK: Name: .reginfo (27) 13 # CHECK: Type: SHT_MIPS_REGINFO (0x70000006) 14 # CHECK: Flags [ (0x2) 15 # CHECK: SHF_ALLOC (0x2) 16 # CHECK: ] 17 # CHECK: Address: 0x [all...] |
mips-hwr-register-names.s | 0 # Check the hardware registers 9 # CHECK: .set push 10 # CHECK-NEXT: .set mips32r2 11 # CHECK-NEXT: rdhwr $4, $hwr_cpunum 12 # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x00,0x3b] 14 # CHECK: .set push 15 # CHECK-NEXT: .set mips32r2 16 # CHECK-NEXT: rdhwr $4, $hwr_cpunum 17 # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x00,0x3b] 20 # CHECK: .set pus [all...] |
/external/llvm/test/tools/llvm-objdump/X86/ |
macho-dis-no-leading-addr.test | 3 # CHECK: (__TEXT,__text) section 4 # CHECK: _main: 5 # CHECK: pushq %rbp 6 # CHECK: movq %rsp, %rbp 7 # CHECK: subq $0x20, %rsp 8 # CHECK: leaq L_.str(%rip), %rax ## literal pool for: "Hello world\n" 9 # CHECK: movl $_main, -0x4(%rbp) 10 # CHECK: movl %edi, -0x8(%rbp) 11 # CHECK: movq %rsi, -0x10(%rbp) 12 # CHECK: movq %rdx, -0x18(%rbp [all...] |
/external/llvm/utils/lit/tests/ |
shtest-shell.py | 0 # Check the internal shell handling component of the ShTest format. 8 # CHECK: -- Testing: 10 # CHECK: FAIL: shtest-shell :: error-0.txt 11 # CHECK: *** TEST 'shtest-shell :: error-0.txt' FAILED *** 12 # CHECK: Command 0: "not-a-real-command" 13 # CHECK: Command 0 Result: 127 14 # CHECK: Command 0 Stderr: 15 # CHECK: 'not-a-real-command': command not found 16 # CHECK: *** 20 # CHECK: FAIL: shtest-shell :: error-1.tx [all...] |
/external/clang/test/Analysis/ |
retain-release-path-notes-gc.m | 8 not to actually check all possible retain/release errors. 76 // CHECK: <key>diagnostics</key> 77 // CHECK-NEXT: <array> 78 // CHECK-NEXT: <dict> 79 // CHECK-NEXT: <key>path</key> 80 // CHECK-NEXT: <array> 81 // CHECK-NEXT: <dict> 82 // CHECK-NEXT: <key>kind</key><string>control</string> 83 // CHECK-NEXT: <key>edges</key> 84 // CHECK-NEXT: <array [all...] |
/external/clang/test/OpenMP/ |
ordered_ast_print.cpp | 53 // CHECK: static int a; 54 // CHECK-NEXT: #pragma omp for ordered 55 // CHECK-NEXT: for (int i = 0; i < argc; ++i) 56 // CHECK-NEXT: #pragma omp ordered 57 // CHECK-NEXT: { 58 // CHECK-NEXT: a = 2; 59 // CHECK-NEXT: } 60 // CHECK-NEXT: #pragma omp for ordered 61 // CHECK-NEXT: for (int i = 0; i < argc; ++i) 62 // CHECK-NEXT: #pragma omp ordered thread [all...] |