| /external/clang/test/Analysis/ |
| plist-output-alternate.m | 60 // CHECK: <key>diagnostics</key>
61 // CHECK-NEXT: <array>
62 // CHECK-NEXT: <dict>
63 // CHECK-NEXT: <key>path</key>
64 // CHECK-NEXT: <array>
65 // CHECK-NEXT: <dict>
66 // CHECK-NEXT: <key>kind</key><string>event</string>
67 // CHECK-NEXT: <key>location</key>
68 // CHECK-NEXT: <dict>
69 // CHECK-NEXT: <key>line</key><integer>5</integer
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| cmpxchg-weak.ll | 4 ; CHECK-LABEL: test_cmpxchg_weak:
8 ; CHECK-NEXT: BB#0:
9 ; CHECK-NEXT: dmb ish
10 ; CHECK-NEXT: ldrex [[LOADED:r[0-9]+]], [r0]
11 ; CHECK-NEXT: cmp [[LOADED]], r1
12 ; CHECK-NEXT: bne [[LDFAILBB:LBB[0-9]+_[0-9]+]]
13 ; CHECK-NEXT: BB#1:
14 ; CHECK-NEXT: strex [[SUCCESS:r[0-9]+]], r2, [r0]
15 ; CHECK-NEXT: cmp [[SUCCESS]], #0
16 ; CHECK-NEXT: bne [[FAILBB:LBB[0-9]+_[0-9]+]
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| statepoint-stackmap-format.ll | 4 ; This test is a sanity check to ensure statepoints are generating StackMap
14 ; CHECK-LABEL: test
17 ; CHECK: subq $40, %rsp
18 ; CHECK: movq $0, 24(%rsp)
19 ; CHECK: movq %rdi, 16(%rsp)
20 ; CHECK: movq %rax, 8(%rsp)
21 ; CHECK: callq return_i1
22 ; CHECK: addq $40, %rsp
23 ; CHECK: retq
43 ; CHECK-LABEL: test_derived_ar
[all...] |
| uint_to_fp-2.ll | 5 ; CHECK-LABEL: test1:
6 ; CHECK: # BB#0: # %entry
7 ; CHECK-NEXT: pushl %eax
8 ; CHECK-NEXT: movsd .LCPI0_0, %xmm0
9 ; CHECK-NEXT: movd {{[0-9]+}}(%esp), %xmm1
10 ; CHECK-NEXT: orpd %xmm0, %xmm1
11 ; CHECK-NEXT: subsd %xmm0, %xmm1
12 ; CHECK-NEXT: xorps %xmm0, %xmm0
13 ; CHECK-NEXT: cvtsd2ss %xmm1, %xmm0
14 ; CHECK-NEXT: movss %xmm0, (%esp
[all...] |
| /external/llvm/test/MC/Mips/ |
| mips_abi_flags_xx_set.s | 2 # RUN: FileCheck %s -check-prefix=CHECK-ASM
6 # RUN: FileCheck %s -check-prefix=CHECK-OBJ
8 # CHECK-ASM: .module fp=xx
9 # CHECK-ASM: .set fp=64
12 # CHECK-OBJ: Section {
13 # CHECK-OBJ: Index: 5
14 # CHECK-OBJ-LABEL: Name: .MIPS.abiflags (12)
15 # CHECK-OBJ: Type: SHT_MIPS_ABIFLAGS (0x7000002A
[all...] |
| /external/llvm/test/MC/SystemZ/ |
| regs-bad.s | 6 #CHECK: error: invalid operand for instruction
7 #CHECK: lr %f0,%r1
8 #CHECK: error: invalid operand for instruction
9 #CHECK: lr %a0,%r1
10 #CHECK: error: invalid operand for instruction
11 #CHECK: lr %r0,%f1
12 #CHECK: error: invalid operand for instruction
13 #CHECK: lr %r0,%a1
14 #CHECK: error: invalid operand for instruction
15 #CHECK: lr %r0,
[all...] |
| insn-bad-zEC12.s | 5 #CHECK: error: {{(instruction requires: vector)?}}
6 #CHECK: lcbb %r0, 0, 0
10 #CHECK: error: invalid operand
11 #CHECK: ntstg %r0, -524289
12 #CHECK: error: invalid operand
13 #CHECK: ntstg %r0, 524288
18 #CHECK: error: invalid operand
19 #CHECK: ppa %r0, %r0, -1
20 #CHECK: error: invalid operand
21 #CHECK: ppa %r0, %r0, 1
[all...] |
| /external/llvm/test/tools/llvm-readobj/ARM/ |
| attribute-5.s | 3 @ RUN: | llvm-readobj -arm-attributes - | FileCheck %s --check-prefix=CHECK-OBJ
5 @CHECK: .eabi_attribute 6, 5
6 @CHECK-OBJ: Tag: 6
7 @CHECK-OBJ-NEXT: Value: 5
8 @CHECK-OBJ-NEXT: TagName: CPU_arch
9 @CHECK-OBJ-NEXT: Description: ARM v5TEJ
12 @CHECK: .eabi_attribute 10, 5
13 @CHECK-OBJ: Tag: 10
14 @CHECK-OBJ-NEXT: Value:
[all...] |
| attribute-6.s | 3 @ RUN: | llvm-readobj -arm-attributes - | FileCheck %s --check-prefix=CHECK-OBJ
5 @CHECK: .eabi_attribute 6, 6
6 @CHECK-OBJ: Tag: 6
7 @CHECK-OBJ-NEXT: Value: 6
8 @CHECK-OBJ-NEXT: TagName: CPU_arch
9 @CHECK-OBJ-NEXT: Description: ARM v6
12 @CHECK: .eabi_attribute 10, 6
13 @CHECK-OBJ: Tag: 10
14 @CHECK-OBJ-NEXT: Value:
[all...] |
| attribute-7.s | 3 @ RUN: | llvm-readobj -arm-attributes - | FileCheck %s --check-prefix=CHECK-OBJ
5 @CHECK: .eabi_attribute 6, 7
6 @CHECK-OBJ: Tag: 6
7 @CHECK-OBJ-NEXT: Value: 7
8 @CHECK-OBJ-NEXT: TagName: CPU_arch
9 @CHECK-OBJ-NEXT: Description: ARM v6KZ
12 @CHECK: .eabi_attribute 10, 7
13 @CHECK-OBJ: Tag: 10
14 @CHECK-OBJ-NEXT: Value:
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| or-04.ll | 5 ; Check the lowest useful OILL value.
7 ; CHECK-LABEL: f1:
8 ; CHECK: oill %r2, 1
9 ; CHECK: br %r14
14 ; Check the high end of the OILL range.
16 ; CHECK-LABEL: f2:
17 ; CHECK: oill %r2, 65535
18 ; CHECK: br %r14
23 ; Check the lowest useful OILH value, which is the next value up.
25 ; CHECK-LABEL: f3
[all...] |
| /external/clang/test/Layout/ |
| ms-x86-empty-virtual-base.cpp | 4 // RUN: | FileCheck %s -check-prefix CHECK-X64
29 // CHECK: *** Dumping AST Record Layout
30 // CHECK: *** Dumping AST Record Layout
31 // CHECK-NEXT: 0 | struct A
32 // CHECK-NEXT: 0 | (A vbtable pointer)
33 // CHECK-NEXT: 4 | int a
34 // CHECK-NEXT: 8 | struct B0 (virtual base) (empty)
35 // CHECK-NEXT: | [sizeof=8, align=8
36 // CHECK-NEXT: | nvsize=8, nvalign=8
[all...] |
| /external/clang/test/CodeGenCXX/ |
| cxx1y-init-captures.cpp | 13 // CHECK-LABEL: define void @_Z1fv(
14 // CHECK: call void @_ZN1SC1Ev(
15 // CHECK: call void @"_ZZ1fvEN3$_0D1Ev"(
17 // CHECK-LABEL: define internal void @"_ZZ1fvEN3$_0D1Ev"(
18 // CHECK: @"_ZZ1fvEN3$_0D2Ev"(
26 // CHECK-LABEL: define void @_Z1gv(
27 // CHECK: getelementptr inbounds {{.*}}, i32 0, i32 0
28 // CHECK: store i32 1, i32*
29 // CHECK: getelementptr inbounds {{.*}}, i32 0, i32 1
30 // CHECK: store i32 2, i32
[all...] |
| threadsafe-statics-exceptions.cpp | 10 // CHECK-LABEL: define void @_Z1fv
11 // CHECK-SAME: personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
13 // CHECK: call i32 @__cxa_guard_acquire(i64* @_ZGVZ1fvE1x)
14 // CHECK: invoke void @_ZN1XC1Ev
15 // CHECK: call i32 @__cxa_atexit
16 // CHECK-NEXT: call void @__cxa_guard_release(i64* @_ZGVZ1fvE1x)
17 // CHECK: br
20 // CHECK: call i8* @__cxa_allocate_exception
21 // CHECK: call void @__cxa_throw
25 // CHECK: landingpad { i8*, i32
[all...] |
| /external/llvm/test/MC/ARM/ |
| eh-directive-unwind_raw.s | 57 @ CHECK: UnwindInformation {
58 @ CHECK: UnwindIndexTable {
59 @ CHECK: SectionName: .ARM.exidx
60 @ CHECK: Entries [
61 @ CHECK: Entry {
62 @ CHECK: Model: Compact (Inline)
63 @ CHECK: PersonalityIndex: 0
64 @ CHECK: Opcodes [
65 @ CHECK: 0xB1 0x01 ; pop {r0}
66 @ CHECK: 0xB0 ; finis
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-swizzle-tbl-i16-layout.ll | 6 ; CHECK: .section __TEXT,__literal16,16byte_literals
7 ; CHECK: .align 4
8 ; CHECK:lCPI0_0:
9 ; CHECK: .byte 0 ; 0x0
10 ; CHECK: .byte 1 ; 0x1
11 ; CHECK: .byte 0 ; 0x0
12 ; CHECK: .byte 1 ; 0x1
13 ; CHECK: .byte 0 ; 0x0
14 ; CHECK: .byte 1 ; 0x1
15 ; CHECK: .byte 0 ; 0x
[all...] |
| arm64-tls-dynamics.ll | 2 ; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -aarch64-elf-ldtls-generation=1 -filetype=obj < %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-RELOC %s
3 ; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -verify-machineinstrs < %s | FileCheck --check-prefix=CHECK-NOLD %s
4 ; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -filetype=obj < %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-NOLD-RELOC %s
9 ; CHECK-LABEL: test_generaldynamic:
14 ; CHECK: adrp x[[TLSDESC_HI:[0-9]+]], :tlsdesc:general_dynamic_var
15 ; CHECK-NEXT: ldr [[CALLEE:x[0-9]+]], [x[[TLSDESC_HI]], :tlsdesc_lo12:general_dynamic_var]
16 ; CHECK-NEXT: add x0, x[[TLSDESC_HI]], :tlsdesc_lo12:general_dynamic_va
[all...] |
| /external/llvm/test/MC/AsmParser/ |
| macro-qualifier-diagnostics.s | 5 # CHECK: error: missing parameter qualifier for 'parameter' in macro 'missing_qualifier'
6 # CHECK: .macro missing_qualifier parameter:
7 # CHECK: ^
11 # CHECK: error: missing parameter qualifier for 'parameter' in macro 'non_identifier_qualifier'
12 # CHECK: .macro non_identifier_qualifier parameter:0
13 # CHECK: ^
17 # CHECK: error: invalid_qualifier is not a valid parameter qualifier for 'parameter' in macro 'invalid_qualifier'
18 # CHECK: .macro invalid_qualifier parameter:invalid_qualifier
19 # CHECK: ^
24 # CHECK: warning: pointless default value for required parameter 'parameter' in macro 'pointless_default
[all...] |
| /external/clang/test/CodeGen/ |
| Atomics.c | 14 void test_op_ignore (void) // CHECK-LABEL: define void @test_op_ignore
16 (void) __sync_fetch_and_add (&sc, 1); // CHECK: atomicrmw add i8
17 (void) __sync_fetch_and_add (&uc, 1); // CHECK: atomicrmw add i8
18 (void) __sync_fetch_and_add (&ss, 1); // CHECK: atomicrmw add i16
19 (void) __sync_fetch_and_add (&us, 1); // CHECK: atomicrmw add i16
20 (void) __sync_fetch_and_add (&si, 1); // CHECK: atomicrmw add i32
21 (void) __sync_fetch_and_add (&ui, 1); // CHECK: atomicrmw add i32
22 (void) __sync_fetch_and_add (&sll, 1); // CHECK: atomicrmw add i64
23 (void) __sync_fetch_and_add (&ull, 1); // CHECK: atomicrmw add i64
25 (void) __sync_fetch_and_sub (&sc, 1); // CHECK: atomicrmw sub i
[all...] |
| exceptions-seh-finally.c | 16 // CHECK-LABEL: define void @basic_finally()
17 // CHECK: invoke void @might_crash()
18 // CHECK: to label %[[invoke_cont:[^ ]*]] unwind label %[[lpad:[^ ]*]]
20 // CHECK: [[invoke_cont]]
21 // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress()
22 // CHECK: call void @"\01?fin$0@0@basic_finally@@"({{i8( zeroext)?}} 0, i8* %[[fp]])
23 // CHECK-NEXT: ret void
25 // CHECK: [[lpad]]
26 // CHECK-NEXT: %[[pad:[^ ]*]] = cleanuppad
27 // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress(
[all...] |
| exceptions-seh-leave.c | 20 // CHECK-LABEL: define i32 @__leave_with___except_simple()
21 // CHECK: store i32 15, i32* %myres
22 // CHECK-NEXT: br label %[[tryleave:[^ ]*]]
23 // CHECK-NOT: store i32 23
24 // CHECK: [[tryleave]]
25 // CHECK-NEXT: ret i32 1
40 // CHECK-LABEL: define i32 @__leave_with___except()
41 // CHECK: invoke void @g()
42 // CHECK-NEXT: to label %[[cont:.*]] unwind label %{{.*}}
47 // CHECK: [[cont]
[all...] |
| /external/clang/test/Sema/ |
| ms_bitfield_layout.c | 16 // CHECK:*** Dumping AST Record Layout
17 // CHECK-NEXT: 0 | struct A
18 // CHECK-NEXT: 0 | char x
19 // CHECK-NEXT: 4:0-21 | int a
20 // CHECK-NEXT: 8:- | int
21 // CHECK-NEXT: 8:0-9 | int c
22 // CHECK-NEXT: 12:0-2 | char b
23 // CHECK-NEXT: 12:3-6 | char d
24 // CHECK-NEXT: 14 | short y
25 // CHECK-NEXT: | [sizeof=16, align=4
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| float-to-int.ll | 2 ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx | FileCheck -check-prefix=CHECK-VSX %s
11 ; CHECK: @foo
12 ; CHECK: fctidz [[REG:[0-9]+]], 1
13 ; CHECK: stfd [[REG]],
14 ; CHECK: ld 3,
15 ; CHECK: blr
17 ; CHECK-VSX: @foo
18 ; CHECK-VSX: xscvdpsxds [[REG:[0-9]+]], 1
19 ; CHECK-VSX: stxsdx [[REG]]
[all...] |
| /external/clang/test/OpenMP/ |
| cancel_codegen.cpp | 11 // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num(
17 // CHECK: call void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(
22 // CHECK: call i32 @__kmpc_single(
23 // CHECK-NOT: @__kmpc_cancel
24 // CHECK: call void @__kmpc_end_single(
25 // CHECK: call void @__kmpc_barrier(%ident_t*
34 // CHECK: call void @__kmpc_for_static_init_4(
35 // CHECK: [[RES:%.+]] = call i32 @__kmpc_cancel(%ident_t* {{[^,]+}}, i32 [[GTID]], i32 3)
36 // CHECK: [[CMP:%.+]] = icmp ne i32 [[RES]], 0
37 // CHECK: br i1 [[CMP]], label %[[EXIT:[^,].+]], label %[[CONTINUE:.+]
[all...] |
| /external/llvm/test/CodeGen/WebAssembly/ |
| global.ll | 8 ; CHECK-NOT: llvm.used
9 ; CHECK-NOT: llvm.metadata
12 ; CHECK: foo:
13 ; CHECK: i32.const $push0=, 0{{$}}
14 ; CHECK-NEXT: i32.load $push1=, answer($pop0){{$}}
15 ; CHECK-NEXT: return $pop1{{$}}
21 ; CHECK-LABEL: call_memcpy:
22 ; CHECK-NEXT: .param i32, i32, i32{{$}}
23 ; CHECK-NEXT: .result i32{{$}}
24 ; CHECK-NEXT: call memcpy, $0, $1, $2{{$}
[all...] |
