| /external/llvm/test/MC/Mips/mips1/ |
| invalid-mips5.s | 26 dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips2/ |
| invalid-mips4.s | 25 dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips5.s | 24 dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| mips16-macro.d | 45 [ 0-9a-f]+: eefd dmultu \$6,\$7
|
| set-arch.d | 12 00000010 <[^>]*> 00a6001d dmultu a1,a2
|
| /external/llvm/test/MC/Disassembler/Mips/mips64/ |
| valid-mips64-el.txt | 90 0x1d 0x00 0xa6 0x00 # CHECK: dmultu $5, $6
230 0x1d 0x00 0xed 0x02 # CHECK: dmultu $23, $13
|
| valid-mips64.txt | 77 0x00 0xa6 0x00 0x1d # CHECK: dmultu $5, $6
125 0x02 0xed 0x00 0x1d # CHECK: dmultu $23, $13
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
| valid-mips64r2-el.txt | 96 0x1d 0x00 0xa6 0x00 # CHECK: dmultu $5, $6
251 0x1d 0x00 0xed 0x02 # CHECK: dmultu $23, $13
|
| valid-mips64r2.txt | 87 0x00 0xa6 0x00 0x1d # CHECK: dmultu $5, $6
138 0x02 0xed 0x00 0x1d # CHECK: dmultu $23, $13
|
| /external/v8/src/mips64/ |
| constants-mips64.h | 425 DMULTU = ((3U << 3) + 5),
972 FunctionFieldToBitNumber(MULTU) | FunctionFieldToBitNumber(DMULTU) |
[all...] |
| disasm-mips64.cc | [all...] |
| /external/llvm/test/MC/Disassembler/Mips/mips3/ |
| valid-mips3-el.txt | 72 0x1d 0x00 0xa6 0x00 # CHECK: dmultu $5, $6
|
| valid-mips3.txt | 54 0x00 0xa6 0x00 0x1d # CHECK: dmultu $5, $6
|
| /external/llvm/test/MC/Disassembler/Mips/mips4/ |
| valid-mips4-el.txt | 76 0x1d 0x00 0xa6 0x00 # CHECK: dmultu $5, $6
|
| valid-mips4.txt | 54 0x00 0xa6 0x00 0x1d # CHECK: dmultu $5, $6
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
| valid-mips64r3-el.txt | 93 0x1d 0x00 0xa6 0x00 # CHECK: dmultu $5, $6
|
| valid-mips64r3.txt | 84 0x00 0xa6 0x00 0x1d # CHECK: dmultu $5, $6
135 0x02 0xed 0x00 0x1d # CHECK: dmultu $23, $13
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
| valid-mips64r5-el.txt | 93 0x1d 0x00 0xa6 0x00 # CHECK: dmultu $5, $6
|
| valid-mips64r5.txt | 84 0x00 0xa6 0x00 0x1d # CHECK: dmultu $5, $6
135 0x02 0xed 0x00 0x1d # CHECK: dmultu $23, $13
|
| /external/llvm/test/MC/Mips/mips3/ |
| valid.s | 79 dmultu $a1,$a2
|
| /external/llvm/test/MC/Mips/mips4/ |
| valid.s | 83 dmultu $a1,$a2
|
| /external/llvm/test/MC/Mips/mips5/ |
| valid.s | 83 dmultu $a1,$a2
|
| /system/core/libpixelflinger/codeflinger/ |
| mips_disassem.c | 83 /*24 */ "mult", "multu","div", "divu", "dmult","dmultu","ddiv","ddivu",
|
| /toolchain/binutils/binutils-2.25/opcodes/ |
| mips16-opc.c | 255 {"dmultu", "x,y", 0xe81d, 0xf81f, RD_1|RD_2|WR_HI|WR_LO, 0, I3, 0, 0 },
|
| /external/pcre/dist/sljit/ |
| sljitNativeMIPS_common.c | 129 #define DMULTU (HI(0) | LO(29))
[all...] |
