| /external/llvm/test/CodeGen/AArch64/ |
| arm64-vfloatintrinsics.ll | 8 ; CHECK: fsqrt.2s
132 ; CHECK: fsqrt.4s
256 ; CHECK: fsqrt.2d
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| arm64-scalar-fp.txt | 120 # FP16: fsqrt h1, h2
121 # CHECK: fsqrt s1, s2
122 # CHECK: fsqrt d1, d2
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/i386-linux-gnu/bits/ |
| mathinline.h | 468 __inline_mathopNP (sqrt, "fsqrt")
469 __inline_mathopNP_ (long double, __sqrtl, "fsqrt")
762 __inline_mathop (__ieee754_sqrt, "fsqrt")
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/arch/ |
| sh2a-or-sh3e.s | 15 fsqrt fr1 ;!/* 1111nnnn01101101 fsqrt <F_REG_N> */{"fsqrt",{F_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}, arch_sh2a_or_sh3e_up}
|
| sh3e.s | 215 fsqrt fr1 ;!/* 1111nnnn01101101 fsqrt <F_REG_N> */{"fsqrt",{F_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}, arch_sh2a_or_sh3e_up}
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-sh/arch/ |
| sh2a-or-sh3e.s | 15 fsqrt fr1 ;!/* 1111nnnn01101101 fsqrt <F_REG_N> */{"fsqrt",{F_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}, arch_sh2a_or_sh3e_up}
|
| sh3e.s | 215 fsqrt fr1 ;!/* 1111nnnn01101101 fsqrt <F_REG_N> */{"fsqrt",{F_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}, arch_sh2a_or_sh3e_up}
|
| /external/llvm/lib/Target/X86/ |
| X86IntrinsicsInfo.h | [all...] |
| /external/llvm/test/MC/AArch64/ |
| neon-simd-misc.s | 730 fsqrt v4.4h, v0.4h
731 fsqrt v6.8h, v8.8h
732 fsqrt v6.4s, v8.4s
733 fsqrt v6.2d, v8.2d
734 fsqrt v4.2s, v0.2s
736 // CHECK: fsqrt v4.4h, v0.4h // encoding: [0x04,0xf8,0xf9,0x2e]
737 // CHECK: fsqrt v6.8h, v8.8h // encoding: [0x06,0xf9,0xf9,0x6e
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsInstrFPU.td | 355 II_SQRT_S, fsqrt>, ABSS_FM<0x4, 16>, ISA_MIPS2;
356 defm FSQRT : ABSS_M<"sqrt.d", II_SQRT_D, fsqrt>, ABSS_FM<0x4, 17>, ISA_MIPS2;
|
| /external/llvm/lib/Target/AMDGPU/ |
| CaymanInstructions.td | 71 def : Pat<(fsqrt f32:$src), (MUL R600_Reg32:$src, (RECIPSQRT_CLAMPED_cm $src))>;
|
| /external/valgrind/docs/internals/ |
| 3_1_BUGSTATUS.txt | 92 vx1492 vx1515 117419 ppc32: fsqrt
|
| /toolchain/binutils/binutils-2.25/include/opcode/ |
| m88k.h | 346 #define FSQRT NOP +5
|
| /toolchain/binutils/binutils-2.25/opcodes/ |
| mmix-opc.c | 122 {"fsqrt", O (21), OP (roundregs), N},
|
| /external/v8/test/cctest/ |
| test-assembler-arm64.cc | [all...] |
| test-disasm-arm64.cc | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 158 case ISD::FSQRT: return "fsqrt";
|
| /external/llvm/lib/Target/PowerPC/ |
| PPC.td | 65 def FeatureFSqrt : SubtargetFeature<"fsqrt","HasFSQRT", "true",
66 "Enable the fsqrt instruction">;
|
| PPCCTRLoops.cpp | 301 case Intrinsic::sqrt: Opcode = ISD::FSQRT; break;
342 Opcode = ISD::FSQRT; break;
|
| /external/llvm/test/CodeGen/Mips/msa/ |
| arithmetic_float.ll | 312 ; CHECK-DAG: fsqrt.w [[R3:\$w[0-9]+]], [[R1]]
326 ; CHECK-DAG: fsqrt.d [[R3:\$w[0-9]+]], [[R1]]
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mmix/ |
| list-in-n.d | 44 8c: 1584020e fsqrt \$132,ROUND_UP,\$14
45 90: 150b008d fsqrt \$11,\$141
|
| list-in-r.d | 44 8c: 1584020e fsqrt \$132,ROUND_UP,\$14
45 90: 150b008d fsqrt \$11,\$141
|
| list-in-rn.d | 44 8c: 1584020e fsqrt \$132,ROUND_UP,\$14
45 90: 150b008d fsqrt \$11,\$141
|
| list-insns.d | 42 8c: 1584020e fsqrt \$132,ROUND_UP,\$14
43 90: 150b008d fsqrt \$11,\$141
|
| list-insns.l | 45 42 008c 1584020E FSQRT \$132,ROUND_UP,\$14
46 43 0090 150B008D FSQRT \$11,\$141
|
