/external/llvm/test/CodeGen/X86/ |
avx-win64-args.ll | 15 %y1 = fsub <8 x float> %call, %y
|
complex-fca.ll | 7 %0 = fsub x86_fp80 0xK80000000000000000000, %z9
|
fp-in-intregs.ll | 9 %tmp2 = fsub float -0.000000e+00, %x ; <float> [#uses=1]
|
inline-asm-x-scalar.ll | 20 %tmp4 = fsub float %tmp1, 0x3810000000000000 ; <float> [#uses=1]
|
and-su.ll | 34 %4 = fsub double -0.000000e+00, %x 46 %7 = fsub double -0.000000e+00, %y
|
/external/llvm/test/MC/X86/ |
intel-syntax-2.s | 24 fsub label
|
/external/llvm/test/Transforms/BBVectorize/ |
simple3.ll | 13 %X1 = fsub double %A1, %B1 14 %X2 = fsub double %A2, %B2 15 %X3 = fsub double %A3, %B3 16 ; CHECK: %X1 = fsub <3 x double> %X1.v.i0, %X1.v.i1
|
req-depth.ll | 6 %X1 = fsub double %A1, %B1 7 %X2 = fsub double %A2, %B2
|
simple-sel.ll | 12 %X1 = fsub double %A1, %B1 13 %X2 = fsub double %A2, %B2 14 ; CHECK: %X1 = fsub <2 x double> %X1.v.i0.2, %X1.v.i1.2 39 %X1 = fsub double %A1, %B1 40 %X2 = fsub double %A2, %B2 41 ; CHECK: %X1 = fsub <2 x double> %X1.v.i0.2, %X1.v.i1.2
|
/external/llvm/test/Transforms/InstCombine/ |
fpcast.ll | 28 ; CHECK: fsub 29 %b = fsub float -0.0, %a 37 ; CHECK: fsub fast 38 %b = fsub fast float -0.0, %a
|
fpextend_x86.ll | 18 %wr = fsub x86_fp80 %wa, %wb 22 ; CHECK: fsub x86_fp80
|
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
float.l | 22 14 0016 DEE1 [ ]*fsub 24 15 0018 D8E3 [ ]*fsub %st\(3\) 25 16 001a D8E3 [ ]*fsub %st\(3\),%st 26 17 001c DCE3 [ ]*fsub %st,%st\(3\)
|
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mmix/ |
reg-op-r.d | 15 18: 061726d4 fsub \$23,\$38,\$212
|
reg-op.l | 12 9 0018 061726D4 FSUB X,\$38,\$212
|
/external/llvm/test/CodeGen/Thumb2/ |
2009-08-07-NeonFPBug.ll | 44 %5 = fsub float %1, %3 ; <float> [#uses=2] 47 %8 = fsub float %7, %6 ; <float> [#uses=2] 48 %9 = fsub float %4, %6 ; <float> [#uses=1] 50 %11 = fsub float %5, %8 ; <float> [#uses=1] 58 %19 = fsub float %13, %16 ; <float> [#uses=1] 60 %21 = fsub float %18, %17 ; <float> [#uses=1] 64 %25 = fsub float %24, %23 ; <float> [#uses=1] 66 %27 = fsub float %26, %20 ; <float> [#uses=3] 67 %28 = fsub float %22, %27 ; <float> [#uses=2] 73 %32 = fsub float %10, %27 ; <float> [#uses=1 [all...] |
/external/llvm/test/CodeGen/ARM/ |
ifcvt10.ll | 19 %sub76 = fsub double %mul73, undef 23 %sub92 = fsub double %mul89, undef
|
softfp-fabs-fneg.ll | 28 %x = fsub nsz double -0.0, %a 36 %x = fsub nsz float -0.0, %a
|
fnmscs.ll | 35 %1 = fsub float -0.0, %0 36 %2 = fsub float %1, %acc 57 %2 = fsub float %1, %acc 77 %1 = fsub double -0.0, %0 78 %2 = fsub double %1, %acc 99 %2 = fsub double %1, %acc
|
/external/llvm/test/CodeGen/Mips/ |
fneg.ll | 20 %sub = fsub float -0.000000e+00, %d 28 %sub = fsub double -0.000000e+00, %d
|
/external/llvm/test/CodeGen/PowerPC/ |
2008-10-28-f128-i32.ll | 14 %6 = fsub ppc_fp128 %a, %5 ; <ppc_fp128> [#uses=3] 19 %8 = fsub ppc_fp128 0xM80000000000000000000000000000000, %6 ; <ppc_fp128> [#uses=1]
|
/external/llvm/test/CodeGen/SystemZ/ |
vec-abs-05.ll | 23 %ret = fsub <2 x double> <double -0.0, double -0.0>, %abs 44 %ret = fsub double -0.0, %abs
|
/external/llvm/test/Transforms/LoopVectorize/X86/ |
rauw-bug.ll | 29 %sub52 = fsub double 0.000000e+00, %div50 31 %sub58 = fsub double 0.000000e+00, %div56
|
/external/clang/test/CodeGen/ |
arm64_vfma.c | 84 // CHECK: [[NEG:%.*]] = fsub <2 x float> {{.*}}, %a2 92 // CHECK: [[NEG:%.*]] = fsub <4 x float> {{.*}}, %a2 100 // CHECK: [[NEG:%.*]] = fsub <2 x double> {{.*}}, %a2 110 // CHECK: [[NEG:%.*]] = fsub <2 x float> {{.*}}, %a3 121 // CHECK: [[NEG:%.*]] = fsub <2 x float> {{.*}}, %a3 132 // CHECK: [[NEG:%.*]] = fsub <1 x double> {{.*}}, %a3
|
/external/llvm/lib/Target/Mips/ |
MicroMipsInstrFPU.td | 8 def FSUB_S_MM : MMRel, ADDS_FT<"sub.s", FGR32Opnd, II_SUB_S, 0, fsub>, 17 def FSUB_MM : MMRel, ADDS_FT<"sub.d", AFGR64Opnd, II_SUB_D, 0, fsub>, 124 def MSUB_S_MM : MMRel, MADDS_FT<"msub.s", FGR32Opnd, II_MSUB_S, fsub>, 128 def NMSUB_S_MM : MMRel, NMADDS_FT<"nmsub.s", FGR32Opnd, II_NMSUB_S, fsub>, 133 def MSUB_D32_MM : MMRel, MADDS_FT<"msub.d", AFGR64Opnd, II_MSUB_D, fsub>, 137 def NMSUB_D32_MM : MMRel, NMADDS_FT<"nmsub.d", AFGR64Opnd, II_NMSUB_D, fsub>,
|
/external/llvm/test/Transforms/SLPVectorizer/AArch64/ |
commute.ll | 13 ; CHECK: %5 = fsub fast <2 x float> %2, %4 28 %sub = fsub fast float %conv, %0 31 %sub10 = fsub fast float %conv5, %1 48 ; CHECK: %5 = fsub fast <2 x float> %2, %4 63 %sub = fsub fast float %conv, %0 66 %sub10 = fsub fast float %conv5, %1
|