/external/llvm/test/CodeGen/PowerPC/ |
fma-assoc.ll | 47 %I = fsub double %H, %E ; <double> [#uses=1] 66 %I = fsub double %E, %H ; <double> [#uses=1] 164 %J = fsub double %I, %E ; <double> [#uses=1] 183 %J = fsub double %I, %E ; <double> [#uses=1] 203 %J = fsub double %E, %I ; <double> [#uses=1] 223 %J = fsub double %E, %I ; <double> [#uses=1]
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ppcsoftops.ll | 32 %sub = fsub double %0, %1
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return-val-i128.ll | 17 %tmp5 = fsub float -0.000000e+00, %tmp4 ; <float> [#uses=1]
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/external/llvm/test/CodeGen/X86/ |
2010-05-25-DotDebugLoc.ll | 32 %10 = fsub float %9, %a, !dbg !23 ; <float> [#uses=1] 48 %19 = fsub float %b, %18, !dbg !27 ; <float> [#uses=1] 83 %31 = fsub float %a, %a, !dbg !32 ; <float> [#uses=3] 90 %35 = fsub float %b, %b, !dbg !32 ; <float> [#uses=1] 96 %38 = fsub float %c, %c, !dbg !32 ; <float> [#uses=1] 101 %40 = fsub float %d, %d, !dbg !32 ; <float> [#uses=1] 110 %44 = fsub float %b, %b, !dbg !34 ; <float> [#uses=1] 123 %54 = fsub float %52, %53, !dbg !36 ; <float> [#uses=1] 130 %57 = fsub float %c, %c, !dbg !37 ; <float> [#uses=1] 137 %61 = fsub float %d, %d, !dbg !37 ; <float> [#uses=1 [all...] |
2011-03-02-DAGCombiner.ll | 27 %sub = fsub float %tmp, %conv 36 %sub4 = fsub x86_fp80 %conv3, %tmp1
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avx512-cmp.ll | 10 %c = fsub double %a, %b 24 %c = fsub float %a, %b
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fp128-libcalls.ll | 36 %sub = fsub fp128 %d1, %d2 48 %sub = fsub fp128 %0, %d1
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pr2656.ll | 27 %neg = fsub float -0.000000e+00, %tmp1 ; <float> [#uses=1] 29 %neg4 = fsub float -0.000000e+00, %tmp3 ; <float> [#uses=1]
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pseudo_cmov_lower.ll | 76 %sub = fsub float %t1, %t2 90 %sub = fsub double %t1, %t2 104 %sub = fsub <4 x float> %t1, %t2 118 %sub = fsub <2 x double> %t1, %t2 182 %t73 = fsub <8 x float> %v73, %v72 183 %t83 = fsub <4 x double> %v83, %v82 184 %t93 = fsub <16 x float> %v93, %v92 185 %t103 = fsub <8 x double> %v103, %v102
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/external/llvm/test/CodeGen/AMDGPU/ |
si-sgpr-spill.ll | 133 %125 = fsub float %124, %122 140 %131 = fsub float %130, %128 173 %159 = fsub float %158, %156 180 %165 = fsub float %164, %162 187 %171 = fsub float %170, %168 194 %177 = fsub float %176, %174 227 %210 = fsub float -0.000000e+00, %208 229 %212 = fsub float -0.000000e+00, %209 422 %381 = fsub float -0.000000e+00, %95 423 %382 = fsub float -0.000000e+00, %9 [all...] |
llvm.AMDGPU.clamp.ll | 40 %src.fneg = fsub float -0.0, %src 53 %src.fneg.fabs = fsub float -0.0, %src.fabs
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selectcc-opt.ll | 14 %2 = fsub float -0.000000e+00, %1 42 %2 = fsub float -0.000000e+00, %1
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input-mods.ll | 15 %r2 = fsub float -0.000000e+00, %r1
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/external/llvm/test/CodeGen/ARM/ |
2009-08-21-PostRAKill.ll | 24 %1 = fsub double 0.000000e+00, %.idx45.val.i ; <double> [#uses=2] 26 %3 = fsub double %t.idx51.val.i, %.idx46.val.i ; <double> [#uses=2]
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2010-04-09-NeonSelect.ll | 8 %1 = fsub <4 x float> %0, undef ; <<4 x float>> [#uses=1]
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2012-04-10-DAGCombine.ll | 15 %tmp10 = fsub float 1.000000e+00, %tmp9
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fastcc-vfp.ll | 35 %sub = fsub double %a, %b
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/external/llvm/test/CodeGen/NVPTX/ |
arithmetic-fp-sm20.ll | 21 %ret = fsub double %a, %b 54 %ret = fsub float %a, %b
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/external/llvm/test/Transforms/GVN/ |
pre-gep-load.ll | 20 %sub = fsub double %1, 1.000000e+00 40 %sub6 = fsub double 3.000000e+00, %3
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/external/llvm/test/Transforms/LoopVectorize/ |
float-reduction.ll | 28 ;CHECK: fsub fast <4 x float> 39 %sub = fsub fast float %sum.04, %0
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/external/llvm/test/Transforms/ScalarRepl/ |
address-space.ll | 11 ; CHECK-NEXT: fsub float 23 %sub = fsub float %tmp5, 5.000000e+00 ; <float> [#uses=1]
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/dalvik/dx/tests/102-verify-nonwide-math/ |
expected.txt | 18 fsub: expected failure occurred
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/external/clang/test/CodeGen/ |
ext-vector.c | 81 // CHECK: fsub <4 x float> 90 // CHECK: fsub <4 x float> 99 // CHECK: fsub <4 x float> 108 // CHECK: fsub <4 x float>
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/external/compiler-rt/lib/builtins/ |
subsf3.c | 18 ARM_EABI_FNALIAS(fsub, subsf3)
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/external/llvm/test/CodeGen/SystemZ/ |
vec-sub-01.ll | 64 %ret = fsub <4 x float> %val1, %val2 74 %ret = fsub <2 x double> %val1, %val2 85 %ret = fsub double %scalar1, %scalar2 146 %ret = fsub <2 x float> %val1, %val2
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