| /external/llvm/test/CodeGen/X86/ |
| 2007-04-11-InlineAsmVectorResult.ll | 14 %tmp108 = fsub <4 x float> zeroinitializer, %tmp105 ; <<4 x float>> [#uses=0]
|
| 2012-04-09-TwoAddrPassBug.ll | 16 %6 = fsub double %5, undef
|
| 2012-09-13-dagco-fneg.ll | 14 %tmp44.i = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, <float 0.000000e+00, float 0.000000e+00, float 1.000000e+00, float 0.000000e+00>
|
| extract-combine.ll | 10 %sub.i25620 = fsub <4 x float> %conv3.i25615, zeroinitializer ; <<4 x float>> [#uses=1]
|
| fmul-combines.ll | 164 %x.neg = fsub float -0.0, %x
165 %y.neg = fsub float -0.0, %y
173 %x.neg = fsub <4 x float> <float -0.0, float -0.0, float -0.0, float -0.0>, %x
174 %y.neg = fsub <4 x float> <float -0.0, float -0.0, float -0.0, float -0.0>, %y
|
| pr24139.ll | 22 %tmp13 = fsub <4 x float> %tmp, %tmp12
24 %tmp15 = fsub <4 x float> %tmp13, %tmp14
65 %tmp56 = fsub <4 x float> %tmp45, %tmp55
67 %tmp58 = fsub <4 x float> %tmp56, %tmp57
109 %tmp100 = fsub <4 x float> %tmp89, %tmp99
111 %tmp102 = fsub <4 x float> %tmp100, %tmp101
|
| /external/llvm/test/Transforms/IndVarSimplify/ |
| 2006-12-10-BitCast.ll | 21 %tmp195.i = fsub float %tmp194.i53, 8.000000e+00 ; <float> [#uses=1]
|
| /prebuilts/go/darwin-x86/src/cmd/internal/obj/ppc64/ |
| anames.go | 116 "FSUB",
|
| /prebuilts/go/linux-x86/src/cmd/internal/obj/ppc64/ |
| anames.go | 116 "FSUB",
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/epiphany/ |
| allinsn.s | 1470 fsub ip,ip,ip
1471 fsub r3,r3,r3
1472 fsub r0,r0,r0
1473 fsub fp,fp,fp
1474 fsub sp,sp,sp
1475 fsub r2,lr,sp
1476 fsub r3,r1,ip
1477 fsub r3,ip,r2
1481 fsub ip,ip,ip
1482 fsub r59,r59,r5
[all...] |
| sample.s | 111 test3 fsub
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| compat.d | 10 [ ]*[a-f0-9]+: dc e3 fsub %st,%st\(3\)
|
| /external/llvm/test/Bitcode/ |
| binaryFloatInstructions.3.2.ll | 91 define void @fsub(float %x1){
93 ; CHECK: %res1 = fsub float %x1, %x1
94 %res1 = fsub float %x1, %x1
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| cvt_rpi_i32_f32.ll | 33 ; FIXME: This doesn't work because it forms fsub 0.5, x
41 %x.fneg = fsub float -0.000000e+00, %x
60 %x.fabs.fneg = fsub float -0.000000e+00, %x.fabs
|
| schedule-fs-loop-nested-if.ll | 12 %6 = fsub float -0.000000e+00, %5
17 %11 = fsub float -0.000000e+00, %10
28 %22 = fsub float -0.000000e+00, %21
|
| mad-combine.ll | 127 ; (fsub (fmul x, y), z) -> (fma x, y, (fneg z))
152 %fma = fsub float %mul, %c
157 ; (fsub (fmul x, y), z) -> (fma x, y, (fneg z))
192 %fma0 = fsub float %mul, %c
193 %fma1 = fsub float %mul, %d
199 ; (fsub x, (fmul y, z)) -> (fma (fneg y), z, x)
224 %fma = fsub float %c, %mul
229 ; (fsub x, (fmul y, z)) -> (fma (fneg y), z, x)
263 %fma0 = fsub float %c, %mul
264 %fma1 = fsub float %d, %mu
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| 2011-11-14-EarlyClobber.ll | 38 %sub = fsub double 1.000000e+00, %call
49 %sub16 = fsub double %mul13, %mul15
55 %sub27 = fsub double %mul24, undef
|
| 2009-07-18-RewriterBug.ll | 93 %46 = fsub double %39, %21 ; <double> [#uses=1]
94 %47 = fsub double %45, %23 ; <double> [#uses=1]
96 %49 = fsub double %43, %21 ; <double> [#uses=1]
97 %50 = fsub double %41, %23 ; <double> [#uses=1]
99 %52 = fsub double %48, %51 ; <double> [#uses=1]
113 %63 = fsub double %60, %39 ; <double> [#uses=1]
114 %64 = fsub double %23, %41 ; <double> [#uses=1]
116 %66 = fsub double %21, %39 ; <double> [#uses=1]
117 %67 = fsub double %62, %41 ; <double> [#uses=1]
119 %69 = fsub double %65, %68 ; <double> [#uses=1
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
| opc-f.s | 119 fsub f4 = f5, f6
120 fsub.s0 f4 = f5, f6
121 fsub.s1 f4 = f5, f6
122 fsub.s2 f4 = f5, f6
123 fsub.s3 f4 = f5, f6
125 fsub.s f4 = f5, f6
126 fsub.s.s0 f4 = f5, f6
127 fsub.s.s1 f4 = f5, f6
128 fsub.s.s2 f4 = f5, f6
129 fsub.s.s3 f4 = f5, f
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| fsel.ll | 81 ; CHECK-FM: fsub [[REG:[0-9]+]], 2, 1
102 ; CHECK-FM: fsub [[REG:[0-9]+]], 1, 2
123 ; CHECK-FM: fsub [[REG:[0-9]+]], 1, 2
144 ; CHECK-FM: fsub [[REG:[0-9]+]], 2, 1
165 ; CHECK-FM: fsub [[REG:[0-9]+]], 1, 2
|
| /external/llvm/test/Transforms/SLPVectorizer/X86/ |
| crash_bullet.ll | 50 %sub600 = fsub float %add587, undef
52 %sub613 = fsub float %add587, %sub600
55 %sub639 = fsub float %add626, undef
56 %sub652 = fsub float %add626, %sub639
109 %sub345 = fsub float %mul341, %mul344
|
| /toolchain/binutils/binutils-2.25/opcodes/ |
| m88k-dis.c | 183 {0x84003000,"fsub.sss ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {5,1,PFLT,FSUB ,0,1,1,1,0,0,0,1,0,0,0,0} },
184 {0x84003080,"fsub.ssd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,2,PFLT,FSUB ,0,1,1,1,0,0,0,1,0,0,1,0} },
185 {0x84003200,"fsub.sds ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,2,PFLT,FSUB ,0,1,1,1,0,0,0,1,0,1,0,0} },
186 {0x84003280,"fsub.sdd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,2,PFLT,FSUB ,0,1,1,1,0,0,0,1,0,1,1,0} },
187 {0x84003020,"fsub.dss ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,2,PFLT,FSUB ,0,1,1,1,0,0,0,1,1,0,0,0} }
[all...] |
| /external/llvm/test/CodeGen/Mips/msa/ |
| 3rf.ll | 418 %2 = tail call <4 x float> @llvm.mips.fsub.w(<4 x float> %0, <4 x float> %1)
423 declare <4 x float> @llvm.mips.fsub.w(<4 x float>, <4 x float>) nounwind
428 ; CHECK: fsub.w
440 %2 = tail call <2 x double> @llvm.mips.fsub.d(<2 x double> %0, <2 x double> %1)
445 declare <2 x double> @llvm.mips.fsub.d(<2 x double>, <2 x double>) nounwind
450 ; CHECK: fsub.d
459 %2 = fsub <4 x float> %0, %1
467 ; CHECK: fsub.w
475 %2 = fsub <2 x double> %0, %1
483 ; CHECK: fsub.
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mn10300/ |
| am33-2.c | 497 def_am_insn (fsub, fsfs, 3, 0xf964,
499 def_am_insn (fsub, fsfsfs, 4, 0xfb64,
501 def_am_insn (fsub, i32fsfs, 7, 0xfe64,
531 am_insn (fsub, fsfs),
532 am_insn (fsub, fsfsfs),
533 am_insn (fsub, i32fsfs),
585 def_am_insn (fsub, fdfd, 3, 0xf9e4,
587 def_am_insn (fsub, fdfdfd, 4, 0xfbe4,
611 am_insn (fsub, fdfd),
612 am_insn (fsub, fdfdfd)
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| fp-cmp-04.ll | 92 %res = fsub float %a, %cur
131 %res = fsub float -0.0, %abs
150 %res = fsub float -0.0, %a
217 %sub = fsub float %c, %add
378 %res = fsub float -0.0, %abs
397 %res = fsub float -0.0, %a
|
