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  /external/llvm/test/CodeGen/X86/
lsr-reuse-trunc.ll 40 %13 = fsub <4 x float> %12, %11
vec_ss_load_fold.ll 25 %tmp28 = fsub float %f, 1.000000e+00 ; <float> [#uses=1]
  /external/llvm/utils/emacs/
llvm-mode.el 46 `(,(regexp-opt '("fadd" "fsub" "fmul" "fdiv" "frem") 'symbols) . font-lock-keyword-face)
  /external/llvm/utils/vim/syntax/
llvm.vim 28 syn keyword llvmStatement fptosi fptoui fptrunc free frem fsub getelementptr
  /external/proguard/src/proguard/classfile/instruction/
Instruction.java 139 false, // fsub
347 false, // fsub
556 2, // fsub
765 1, // fsub
  /external/v8/src/ppc/
codegen-ppc.cc 562 __ fsub(double_scratch1, double_scratch1, result);
566 __ fsub(double_scratch1, double_scratch1, input);
567 __ fsub(result, result, double_scratch1);
572 __ fsub(result, result, double_scratch1);
  /prebuilts/gdb/darwin-x86/lib/python2.7/plat-mac/Carbon/
MacTextEditor.py 127 kTXNDoFontSubstitution = FOUR_CHAR_CODE('fSub')
  /prebuilts/python/darwin-x86/2.7.5/lib/python2.7/plat-mac/Carbon/
MacTextEditor.py 127 kTXNDoFontSubstitution = FOUR_CHAR_CODE('fSub')
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/epiphany/
allinsn.d     [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
general.s 140 fsub
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/pj/
ops.s 163 fsub
  /external/llvm/test/MC/AArch64/
arm64-fp-encoding.s 156 fsub h1, h2, h3
157 fsub s1, s2, s3
158 fsub d1, d2, d3
160 ; FP16: fsub h1, h2, h3 ; encoding: [0x41,0x38,0xe3,0x1e]
162 ; NO-FP16-NEXT: fsub h1, h2, h3
163 ; CHECK: fsub s1, s2, s3 ; encoding: [0x41,0x38,0x23,0x1e]
164 ; CHECK: fsub d1, d2, d3 ; encoding: [0x41,0x38,0x63,0x1e]
  /external/llvm/lib/Target/SystemZ/
SystemZInstrFP.td 368 def SEBR : BinaryRRE<"seb", 0xB30B, fsub, FP32, FP32>;
369 def SDBR : BinaryRRE<"sdb", 0xB31B, fsub, FP64, FP64>;
370 def SXBR : BinaryRRE<"sxb", 0xB34B, fsub, FP128, FP128>;
372 def SEB : BinaryRXE<"seb", 0xED0B, fsub, FP32, load, 4>;
373 def SDB : BinaryRXE<"sdb", 0xED1B, fsub, FP64, load, 8>;
  /prebuilts/go/darwin-x86/src/cmd/internal/rsc.io/x86/x86asm/
gnu.go 22 case FDIV, FDIVR, FSUB, FSUBR, FDIVP, FDIVRP, FSUBP, FSUBRP:
23 // DC E0, DC F0: libopcodes swaps FSUBR/FSUB and FDIVR/FDIV, at least
36 case FSUB:
39 inst.Op = FSUB
914 case FADD, FCOM, FCOMP, FDIV, FDIVR, FIADD, FICOM, FICOMP, FIDIV, FIDIVR, FILD, FIMUL, FIST, FISTP, FISTTP, FISUB, FISUBR, FLD, FMUL, FST, FSTP, FSUB, FSUBR:
  /prebuilts/go/linux-x86/src/cmd/internal/rsc.io/x86/x86asm/
gnu.go 22 case FDIV, FDIVR, FSUB, FSUBR, FDIVP, FDIVRP, FSUBP, FSUBRP:
23 // DC E0, DC F0: libopcodes swaps FSUBR/FSUB and FDIVR/FDIV, at least
36 case FSUB:
39 inst.Op = FSUB
914 case FADD, FCOM, FCOMP, FDIV, FDIVR, FIADD, FICOM, FICOMP, FIDIV, FIDIVR, FILD, FIMUL, FIST, FISTP, FISTTP, FISUB, FISUBR, FLD, FMUL, FST, FSTP, FSUB, FSUBR:
  /external/llvm/lib/Transforms/InstCombine/
InstCombineAddSub.cpp 10 // This file implements the visit functions for add, fadd, sub, and fsub.
155 /// FAddCombine is the class for optimizing an unsafe fadd/fsub along
360 if (Opcode == Instruction::FAdd || Opcode == Instruction::FSub) {
383 if (Opcode == Instruction::FSub)
443 I->getOpcode() == Instruction::FSub) && "Expect add/sub");
526 I->getOpcode() == Instruction::FSub) && "Expect add/sub");
718 // Iterate the addends, creating fadd/fsub using adjacent two addends.
    [all...]
  /external/llvm/docs/tutorial/
LangImpl7.rst 468 %subtmp = fsub double %x3, 1.000000e+00
471 %subtmp5 = fsub double %x4, 2.000000e+00
505 %subtmp = fsub double %x, 1.000000e+00
507 %subtmp5 = fsub double %x, 2.000000e+00
533 %subtmp = fsub double %x, 1.000000e+00
535 %subtmp5 = fsub double %x, 2.000000e+00
  /external/valgrind/none/tests/ppc32/
round.c 32 FADD, FSUB, FMUL, FDIV, FMADD,
43 "fadd", "fsub", "fmul", "fdiv", "fmadd", "fmsub", "fnmadd",
483 BINOP("fsub");
956 case FSUB:
1111 case FSUB:
1112 BINOP("fsub");
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/arch/
sh2a.s     [all...]
  /toolchain/binutils/binutils-2.25/include/opcode/
i860.h 443 { "fsub.ss", 0x48000031, 0xb40005ce, "e,f,g", 0 }, /* fsub.p fsrc1,fsrc2,fdest */
444 { "fsub.sd", 0x480000b1, 0xb400054e, "e,f,g", 0 }, /* fsub.p fsrc1,fsrc2,fdest */
445 { "fsub.dd", 0x480001b1, 0xb400044e, "e,f,g", 0 }, /* fsub.p fsrc1,fsrc2,fdest */
  /toolchain/binutils/binutils-2.25/ld/testsuite/ld-sh/arch/
sh2a.s     [all...]
  /external/llvm/lib/CodeGen/SelectionDAG/
DAGCombiner.cpp 593 !TLI.isOperationLegalOrCustom(ISD::FSUB, Op.getValueType()))
596 // fold (fneg (fadd A, B)) -> (fsub (fneg A), B)
600 // fold (fneg (fadd A, B)) -> (fsub (fneg B), A)
603 case ISD::FSUB:
607 // fold (fneg (fsub A, B)) -> (fsub B, A)
655 // fold (fneg (fadd A, B)) -> (fsub (fneg A), B)
658 return DAG.getNode(ISD::FSUB, SDLoc(Op), Op.getValueType(),
662 // fold (fneg (fadd A, B)) -> (fsub (fneg B), A)
663 return DAG.getNode(ISD::FSUB, SDLoc(Op), Op.getValueType()
    [all...]
  /external/llvm/test/CodeGen/ARM/
vmls.ll 43 %tmp5 = fsub <2 x float> %tmp1, %tmp4
87 %tmp5 = fsub <4 x float> %tmp1, %tmp4
vsub.ll 44 %tmp3 = fsub <2 x float> %tmp1, %tmp2
89 %tmp3 = fsub <4 x float> %tmp1, %tmp2
  /external/llvm/test/Transforms/Float2Int/
basic.ll 26 %2 = fsub float %1, 1.0
37 %2 = fsub float %1, 1.0

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