| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-sh/arch/ |
| sh3e.s | 217 fsub fr2,fr1 ;!/* 1111nnnnmmmm0001 fsub <F_REG_M>,<F_REG_N>*/{"fsub",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_1}, arch_sh2e_up}
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 69 /// FSUB isn't legal.
271 case ISD::FSUB:
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXVector.td | 523 defm VSubf : FloatBinVOp<"sub.", fsub, FSUBf64rr, FSUBf32rr, FSUBf32rr_ftz>;
576 def : Pat<(fsub V2F32Regs:$a, (fmul V2F32Regs:$b, V2F32Regs:$c)),
580 def : Pat<(fsub (fmul V2F32Regs:$a, V2F32Regs:$b), V2F32Regs:$c),
591 def : Pat<(fsub V4F32Regs:$a, (fmul V4F32Regs:$b, V4F32Regs:$c)),
595 def : Pat<(fsub (fmul V4F32Regs:$a, V4F32Regs:$b), V4F32Regs:$c),
606 def : Pat<(fsub V2F64Regs:$a, (fmul V2F64Regs:$b, V2F64Regs:$c)),
610 def : Pat<(fsub (fmul V2F64Regs:$a, V2F64Regs:$b), V2F64Regs:$c),
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| avx512-arith.ll | 54 %sub.i = fsub <8 x double> %x, %y
65 %sub.i = fsub <8 x double> %y, %tmp2
75 %sub.i = fsub <16 x float> %x, %y
86 %sub.i = fsub <16 x float> %y, %tmp2
667 %x = fsub <16 x float> %i, %j
823 %res = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %a
832 %res = fsub <8 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %a
[all...] |
| 2011-11-22-AVX2-Domains.ll | 41 %binop411 = fsub <8 x float> <float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00>, undef
|
| avx512vl-arith.ll | 235 %x = fsub <8 x float> %i, %j
297 %x = fsub <4 x double> %i, %j
628 %x = fsub <4 x float> %i, %j
691 %x = fsub <2 x double> %i, %j
|
| break-false-dep.ll | 104 %sub = fsub float %s1.0.lcssa, %s2.0.lcssa
|
| combine-64bit-vec-binop.ll | 253 %sub = fsub <2 x float> %1, %2
|
| fold-pcmpeqd-2.ll | 40 %sub140.i = fsub <4 x float> %tmp78, %tmp80 ; <<4 x float>> [#uses=2]
|
| sink-hoist.ll | 120 %tmp47 = fsub <4 x float> %tmp45, %tmp43 ; <<4 x float>> [#uses=2]
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-vmul.ll | 483 %tmp4 = fsub <2 x float> <float -0.0, float -0.0>, %tmp2
494 %tmp4 = fsub <4 x float> <float -0.0, float -0.0, float -0.0, float -0.0>, %tmp2
505 %tmp4 = fsub <2 x double> <double -0.0, double -0.0>, %tmp2
516 %tmp4 = fsub <2 x float> <float -0.0, float -0.0>, %tmp2
527 %tmp4 = fsub <4 x float> <float -0.0, float -0.0, float -0.0, float -0.0>, %tmp2
538 %tmp4 = fsub <2 x double> <double -0.0, double -0.0>, %tmp2
547 %0 = fsub <2 x float> <float -0.000000e+00, float -0.000000e+00>, %c
557 %0 = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %c
567 %0 = fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, %c
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineMulDivRem.cpp | 561 // (fmul X, -1.0) --> (fsub -0.0, X)
583 FAddSub->getOpcode() == Instruction::FSub)) {
601 if (Swap && FAddSub->getOpcode() == Instruction::FSub)
642 Value *FSub = Builder->CreateFSub(FMulVal, OpX);
643 FSub->takeName(&I);
644 return ReplaceInstUsesWith(I, FSub);
[all...] |
| /external/llvm/test/MC/X86/ |
| x86-64.s | 1342 // CHECK: fsub %st(1)
1348 fsub %st(1), %st(0) label
1355 // CHECK: fsub %st(0), %st(1)
1361 fsub %st(0), %st(1) label
1368 // CHECK: fsub %st(1)
1374 fsub %st(1) label
|
| /external/v8/src/arm64/ |
| constants-arm64.h | [all...] |
| /dalvik/dx/tests/024-code-bytecode/ |
| expected.txt | 156 0085: fsub
|
| small-class.txt | 160 66 # 0085: fsub
|
| /external/clang/test/CodeGen/ |
| x86-atomic-long_double.c | 141 // CHECK: [[SUB_VALUE:%.+]] = fsub x86_fp80 [[OLD_VALUE]],
178 // CHECK32: [[INC_VALUE:%.+]] = fsub x86_fp80 [[OLD_VALUE]],
374 // CHECK: [[SUB_VALUE:%.+]] = fsub x86_fp80 [[OLD_VALUE]],
410 // CHECK32: [[INC_VALUE:%.+]] = fsub x86_fp80 [[OLD_VALUE]],
[all...] |
| /external/llvm/lib/ExecutionEngine/ |
| ExecutionEngine.cpp | 784 case Instruction::FSub:
819 case Instruction::FSub:
834 case Instruction::FSub:
855 case Instruction::FSub:
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| 2012-01-26-CopyPropKills.ll | 22 %tmp5 = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %tmp4
|
| /external/llvm/test/CodeGen/Generic/ |
| select.ll | 130 %z = fsub float %x, %y ; <float> [#uses=1]
|
| /external/llvm/test/CodeGen/Mips/ |
| fp64a.ll | 111 %1 = fsub double %a, %b
|
| /external/llvm/test/CodeGen/Mips/msa/ |
| llvm-stress-s1704963983.ll | 125 %B74 = fsub double 0.000000e+00, 0.000000e+00
|
| /external/llvm/test/Transforms/LoopVectorize/ |
| scev-exitlim-crash.ll | 22 %call = tail call i32 @fn2(double fadd (double fsub (double undef, double undef), double 1.000000e+00)) #2
|
| /external/llvm/test/Transforms/MemCpyOpt/ |
| memcpy.ll | 13 %tmp5 = fsub x86_fp80 0xK80000000000000000000, %z.1
|
| /external/llvm/test/Transforms/SampleProfile/ |
| fnptr.ll | 63 %sub = fsub double %conv, %call, !dbg !11
|
