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| /prebuilts/tools/linux-x86_64/protoc/include/google/protobuf/stubs/ |
| atomicops_internals_x86_msvc.h | 71 *ptr = value; // works w/o barrier for current Intel chips as of June 2005 108 *ptr = value; // works w/o barrier for current Intel chips as of June 2005 111 // IA-32 Intel Architecture Software Developer's Manual, Volume 3: 115 // http://developer.intel.com/design/pentium4/manuals/index_new.htm
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| clflushopt-intel.d | 3 #name: i386 CLFLUSHOPT insns (Intel disassembly)
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| clwb-intel.d | 3 #name: i386 CLWB insns (Intel disassembly)
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| fsgs-intel.d | 2 #name: i386 FSGSBase (Intel disassembly)
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| long-1-intel.d | 2 #name: i386 long insns (Intel disassembly)
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| prefetchwt1-intel.d | 3 #name: i386 PREFETCHWT1 insns (Intel disassembly)
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| x86-64-cbw-intel.d | 3 #name: x86-64 CBW/CWD & Co (Intel disassembly)
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| x86-64-clflushopt-intel.d | 3 #name: x86_64 CLFLUSHOPT insns (Intel disassembly)
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| x86-64-clwb-intel.d | 3 #name: x86_64 CLWB insns (Intel disassembly)
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| x86-64-long-1-intel.d | 2 #name: x86-64 long insns (Intel disassembly)
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| x86-64-prefetchwt1-intel.d | 3 #name: x86_64 PREFETCHWT1 insns (Intel disassembly)
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| x86-64-rip-intel.d | 3 #name: x86-64 rip addressing (Intel mode)
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| x86-64-xsavec-intel.d | 3 #name: x86_64 XSAVEC insns (Intel disassembly)
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| xsave-intel.d | 4 #name: i386 xsave (Intel mode)
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/ |
| x86-64-cbw-intel.d | 3 #name: x86-64 (ILP32) CBW/CWD & Co (Intel disassembly)
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| x86-64-rip-intel.d | 4 #name: x86-64 (ILP32) rip addressing (Intel mode)
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_state_cache.c | 2 Copyright (C) Intel Corp. 2006. All Rights Reserved. 3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to 168 struct intel_context *intel = &brw->intel; local 171 new_bo = drm_intel_bo_alloc(intel->bufmgr, "program cache", new_size, 64); 323 struct intel_context *intel = &brw->intel; local 333 cache->bo = drm_intel_bo_alloc(intel->bufmgr, 341 struct intel_context *intel = &brw->intel; local [all...] |
| /bionic/libm/x86/ |
| ceil.S | 2 Copyright (c) 2014, Intel Corporation 15 * Neither the name of Intel Corporation nor the names of its contributors
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| ceilf.S | 2 Copyright (c) 2014, Intel Corporation 15 * Neither the name of Intel Corporation nor the names of its contributors
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| floor.S | 2 Copyright (c) 2014, Intel Corporation 15 * Neither the name of Intel Corporation nor the names of its contributors
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| floorf.S | 2 Copyright (c) 2014, Intel Corporation 15 * Neither the name of Intel Corporation nor the names of its contributors
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| lrint.S | 2 Copyright (c) 2014, Intel Corporation 11 * Neither the name of Intel Corporation nor the names of its contributors
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| lrintf.S | 2 Copyright (c) 2014, Intel Corporation 11 * Neither the name of Intel Corporation nor the names of its contributors
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| rint.S | 2 Copyright (c) 2014, Intel Corporation 11 * Neither the name of Intel Corporation nor the names of its contributors
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| rintf.S | 2 Copyright (c) 2014, Intel Corporation 11 * Neither the name of Intel Corporation nor the names of its contributors
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