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  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
mips-abi32-pic.s 117 # 018c ldc1 $f0,lo(L1.9)(at)
mips-gp32-fp32-pic.d 91 144: d4200008 ldc1 \$f0,8\(at\)
mips-gp32-fp32-pic.s 117 # 018c ldc1 $f0,lo(L1.9)(at)
mips-gp64-fp32-pic.d 91 140: d4200008 ldc1 \$f0,8\(at\)
mips-gp64-fp32-pic.s 116 # 0188 ldc1 $f0,lo(L1.9)(at)
mips-gp64-fp32.d 65 d8: d7800000 ldc1 \$f0,0\(gp\)
mips-gp64-fp32.s 69 li.d $f0, 1.9 # 00d8 ldc1 $f0,L1.9(gp)
mips-gp64-fp64-pic.d 90 140: d4200008 ldc1 \$f0,8\(at\)
mips-gp64-fp64-pic.s 116 # 0188 ldc1 $f0,lo(L1.9)(at)
mips-gp64-fp64.d 65 d8: d7800000 ldc1 \$f0,0\(gp\)
mips-gp64-fp64.s 69 li.d $f0, 1.9 # 00d8 ldc1 $f0,L1.9(gp)
micromips.s     [all...]
mips16-intermix.s 925 ldc1 $f0,16($sp)
998 ldc1 $f0,16($sp)
1070 ldc1 $f0,16($sp)
1142 ldc1 $f0,16($sp)
1214 ldc1 $f0,16($sp)
1866 ldc1 $f22,48($sp)
1868 ldc1 $f24,56($sp)
1870 ldc1 $f20,40($sp)
    [all...]
l_d-reloc.d 3 #name: LDC1 with relocation operators
mips.exp 650 run_dump_test_arches "ldc1" [mips_arch_list_matching mips2 !singlefloat]
651 run_dump_test_arches "ldc1-forward" [mips_arch_list_matching mips2 !singlefloat]
667 run_dump_test_arches "ldc1-n32" [mips_arch_list_matching mips3 !singlefloat]
668 run_dump_test_arches "ldc1-forward-n32" \
685 run_dump_test_arches "ldc1-n64" [mips_arch_list_matching mips3 !singlefloat]
686 run_dump_test_arches "ldc1-forward-n64" \
    [all...]
  /external/valgrind/none/tests/mips32/
MoveIns.c 50 "ldc1 $" #FS ", "#offset"($t0)\n\t" \
126 "ldc1 $" #FS ", "#offset"($t0)\n\t" \
195 "ldc1 $f4, 8($t0)\n\t" \
197 "ldc1 $" #FS ", "#offset"($t0)\n\t" \
221 "ldc1 $f4, 8($t0)\n\t" \
223 "ldc1 $" #FS ", "#offset"($t0)\n\t" \
266 "ldc1 $" #FS ", "#offset"($t0)\n\t" \
  /external/v8/src/compiler/mips/
code-generator-mips.cc     [all...]
  /external/v8/src/mips/
deoptimizer-mips.cc 226 __ ldc1(f0, MemOperand(sp, src_offset));
296 __ ldc1(fpu_reg, MemOperand(a1, src_offset));
  /external/v8/src/mips64/
deoptimizer-mips64.cc 232 __ ldc1(f0, MemOperand(sp, src_offset));
301 __ ldc1(fpu_reg, MemOperand(a1, src_offset));
  /toolchain/binutils/binutils-2.25/ld/testsuite/ld-mips-elf/
mips16-intermix-2.s 925 ldc1 $f0,16($sp)
998 ldc1 $f0,16($sp)
1070 ldc1 $f0,16($sp)
1142 ldc1 $f0,16($sp)
1214 ldc1 $f0,16($sp)
1866 ldc1 $f22,48($sp)
1868 ldc1 $f24,56($sp)
1870 ldc1 $f20,40($sp)
    [all...]
  /art/compiler/optimizing/
optimizing_cfi_test_expected.inc 223 // 0x00000024: ldc1 f24, +0(r29)
225 // 0x00000028: ldc1 f25, +8(r29)
463 // 0x00020034: ldc1 f24, +0(r29)
465 // 0x00020038: ldc1 f25, +8(r29)
  /external/llvm/lib/Target/Mips/MCTargetDesc/
MipsNaClELFStreamer.cpp 218 case Mips::LDC1:
  /external/llvm/lib/Target/Mips/
MipsInstrFPU.td 401 def LDC164 : LW_FT<"ldc1", FGR64Opnd, II_LDC1, load>, LW_FM<0x35>, ISA_MIPS2,
407 def LDC1 : MMRel, LW_FT<"ldc1", AFGR64Opnd, II_LDC1, load>, LW_FM<0x35>,
616 def : LoadRegImmPat<LDC1, f64, load>, FGR_32;
  /external/llvm/test/MC/Mips/
micromips-fpu-instructions.s 21 # CHECK-EL: ldc1 $f2, 4($6) # encoding: [0x46,0xbc,0x04,0x00]
86 # CHECK-EB: ldc1 $f2, 4($6) # encoding: [0xbc,0x46,0x00,0x04]
149 ldc1 $f2, 4($6)
  /external/v8/src/compiler/mips64/
code-generator-mips64.cc     [all...]

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