| /external/llvm/test/DebugInfo/X86/ |
| debug-loc-asan.ll | 68 %14 = lshr i64 %6, 3
74 %19 = lshr i64 %18, 3
97 %32 = lshr i64 %31, 3, !dbg !13
|
| /external/llvm/test/Transforms/InstCombine/ |
| and.ll | 109 %B = lshr i8 %A, 7 ; <i8> [#uses=1]
150 %C = lshr i8 %A, 7 ; <i8> [#uses=1]
236 %Z = lshr i32 %Y, 2 ; <i32> [#uses=1]
|
| bswap-fold.ll | 37 %tmp4 = lshr i32 %tmp2, 24
53 ; CHECK-NEXT: %tmp2 = lshr i32 %a, 24
63 ; CHECK-NEXT: %1 = lshr i32 %A, 16
74 ; CHECK-NEXT: %1 = lshr i64 %A, 48
|
| pr17827.ll | 69 %shlp = lshr i8 %p, 5
|
| /external/llvm/test/Transforms/LowerBitSets/ |
| simple.ll | 77 ; CHECK: [[R3:%[^ ]*]] = lshr i32 [[R2]], 2
104 ; CHECK: [[S3:%[^ ]*]] = lshr i32 [[S2]], 8
120 ; CHECK: [[T3:%[^ ]*]] = lshr i32 [[T2]], 2
|
| /external/llvm/test/Transforms/SimplifyCFG/ |
| 2006-08-03-Crash.ll | 52 %tmp154 = lshr i32 %tmp152, 16 ; <i32> [#uses=1]
67 %tmp180 = lshr i32 %tmp178, 16 ; <i32> [#uses=1]
82 %tmp193 = lshr i32 %tmp191, 16 ; <i32> [#uses=1]
|
| /external/javassist/src/main/javassist/bytecode/ |
| Mnemonic.java | 161 "lshr", /* 123*/
|
| /external/llvm/bindings/python/llvm/ |
| enumerations.py | 82 ('LShr', 21),
|
| /external/llvm/test/CodeGen/AArch64/ |
| logical_shifted_reg.ll | 74 %operand_lsr1 = lshr i32 %val2, 1
85 %operand_ror20_small = lshr i32 %val2, 20
164 %operand_lsr1 = lshr i64 %val2, 1
178 %operand_ror20_small = lshr i64 %val2, 20
|
| /external/llvm/test/CodeGen/ARM/ |
| 2013-05-07-ByteLoadSameAddress.ll | 59 %9 = lshr i32 %add65, 8
|
| ldaex-stlex.ll | 25 %tmp6 = lshr i64 %val, 32
|
| prefetch.ll | 47 %tmp1 = lshr i32 %offset, 2
|
| /external/llvm/test/CodeGen/Hexagon/ |
| adde.ll | 30 %tmp21 = lshr i128 %tmp15, 64
|
| cmpb-eq.ll | 43 %shr24 = lshr i8 %0, 4
|
| /external/llvm/test/CodeGen/Hexagon/vect/ |
| vect-store-v2i16.ll | 46 %shr100293p_vec = lshr <2 x i32> %mulp_vec, <i32 15, i32 15>
|
| /external/llvm/test/CodeGen/PowerPC/ |
| ctrloop-sh.ll | 58 %shl = lshr i128 %0, %1
|
| /external/llvm/test/CodeGen/X86/ |
| 2007-10-12-SpillerUnfold2.ll | 20 %tmp253444 = lshr i32 %tmp180181, 4 ; <i32> [#uses=1]
|
| 2011-05-27-CrossClassCoalescing.ll | 27 %shr.i14 = lshr i32 %tmp6.i12, 8
|
| avx-shift.ll | 51 %s = lshr <8 x i32> %a, <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32
64 %s = lshr <16 x i16> %a, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>
76 %s = lshr <4 x i64> %a, <i64 2, i64 2, i64 2, i64 2>
150 %s = lshr <32 x i8> %a, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
|
| legalize-shift-64.ll | 32 %shr = lshr i64 %xx, %sh_prom
|
| vec_anyext.ll | 74 %2 = lshr <4 x i32> %1, <i32 18, i32 18, i32 18, i32 18>
|
| vector-shift-lshr-256.ll | 48 %shift = lshr <4 x i64> %a, %b
104 %shift = lshr <8 x i32> %a, %b
181 %shift = lshr <16 x i16> %a, %b
259 %shift = lshr <32 x i8> %a, %b
294 %shift = lshr <4 x i64> %a, %splat
333 %shift = lshr <8 x i32> %a, %splat
376 %shift = lshr <16 x i16> %a, %splat
454 %shift = lshr <32 x i8> %a, %splat
495 %shift = lshr <4 x i64> %a, <i64 1, i64 7, i64 31, i64 62>
535 %shift = lshr <8 x i32> %a, <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 8, i32 7
[all...] |
| /external/llvm/test/ExecutionEngine/MCJIT/ |
| 2008-06-05-APInt-OverAShr.ll | 33 %tmp1 = lshr i65 %tmp, 64 ; <i65> [#uses=1]
|
| /external/llvm/test/ExecutionEngine/OrcMCJIT/ |
| 2008-06-05-APInt-OverAShr.ll | 33 %tmp1 = lshr i65 %tmp, 64 ; <i65> [#uses=1]
|
| /external/mockito/cglib-and-asm/src/org/mockito/asm/tree/ |
| InsnNode.java | 55 * ISHL, LSHL, ISHR, LSHR, IUSHR, LUSHR, IAND, LAND, IOR, LOR, IXOR,
|
