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  /external/llvm/test/CodeGen/PowerPC/
ctrloop-i64.ll 37 %conv = sdiv i64 %x.05, %d
  /external/llvm/test/CodeGen/X86/
2007-11-30-LoadFolding-Bug.ll 24 %tmp22.i = sdiv i32 0, 2 ; <i32> [#uses=2]
atom-call-reg-indirect-foldedreload64.ll 63 %div = sdiv i32 %7, %8
early-ifcvt.ll 154 %3 = sdiv i32 %a, %b
seh-safe-div-win32.ll 93 %div = sdiv i32 %0, %1
seh-safe-div.ll 100 %div = sdiv i32 %0, %1
  /external/llvm/test/MC/Disassembler/Sparc/
sparc.txt 24 # CHECK: sdiv %g1, %g2, %g3
  /external/llvm/test/Transforms/IndVarSimplify/
eliminate-comparison.ll 130 %tmp13 = sdiv i32 -32768, %__key6.0
147 %tmp57 = sdiv i32 -32768, %__key8.0
181 %tmp13 = sdiv i32 -32768, %__key6.0
198 %tmp57 = sdiv i32 -32768, %__key8.0
  /external/llvm/test/Transforms/Inline/
2009-01-13-RecursiveInlineCrash.ll 151 %5 = sdiv i32 %size, 2 ; <i32> [#uses=1]
155 %9 = sdiv i32 %size, 2 ; <i32> [#uses=1]
160 %14 = sdiv i32 %size, 2 ; <i32> [#uses=1]
165 %19 = sdiv i32 %size, 2 ; <i32> [#uses=1]
  /external/llvm/test/Transforms/LoopStrengthReduce/
2012-01-02-nopreheader.ll 21 %0 = sdiv i32 %n, undef
  /external/llvm/utils/emacs/
llvm-mode.el 43 `(,(regexp-opt '("add" "sub" "mul" "sdiv" "udiv" "urem" "srem" "and" "or" "xor"
  /external/llvm/utils/vim/syntax/
llvm.vim 32 syn keyword llvmStatement olt one or ord phi ptrtoint resume ret sdiv select
  /external/vixl/doc/
changelog.md 104 + Fixed `smull`, `fmsub` and `sdiv` simulation.
  /art/compiler/utils/arm/
assembler_arm32_test.cc 53 // Arm-v7a, cortex-a15 (means we have sdiv).
715 TEST_F(AssemblerArm32Test, Sdiv) {
716 T4Helper(&arm::Arm32Assembler::sdiv, true, "sdiv{cond} {reg1}, {reg2}, {reg3}", "sdiv");
  /external/valgrind/none/tests/arm64/
integer.stdout.exp     [all...]
  /external/llvm/unittests/ADT/
APIntTest.cpp 182 EXPECT_EQ(neg_one, one.sdiv(neg_one));
183 EXPECT_EQ(neg_one, neg_one.sdiv(one));
184 EXPECT_EQ(one, neg_one.sdiv(neg_one));
185 EXPECT_EQ(one, one.sdiv(one));
406 q = p.sdiv(a);
422 q = p.sdiv(b);
    [all...]
  /external/llvm/include/llvm/ADT/
APSInt.h 112 *this = sdiv(RHS);
121 return IsUnsigned ? APSInt(udiv(RHS), true) : APSInt(sdiv(RHS), false);
  /external/llvm/test/Transforms/LICM/
sinking.ll 227 %tmp.6 = sdiv i32 %N, %N_addr.0.pn ; <i32> [#uses=1]
237 ; CHECK-NEXT: %tmp.6.le = sdiv i32 %N, %[[LCSSAPHI]]
  /external/llvm/test/Transforms/SampleProfile/
propagate.ll 82 %div = sdiv i64 %7, 3, !dbg !18
97 %div4 = sdiv i64 %10, 4, !dbg !22
  /external/llvm/lib/Target/XCore/
XCoreLowerThreadLocal.cpp 93 case Instruction::SDiv:
  /external/llvm/test/CodeGen/Mips/
mips64instrs.ll 128 %div = sdiv i64 %0, %1
  /external/llvm/test/CodeGen/WebAssembly/
i32.ll 48 %a = sdiv i32 %x, %y
i64.ll 48 %a = sdiv i64 %x, %y
  /external/llvm/test/Other/
lint.ll 37 %sd = sdiv i32 2, 0
  /external/llvm/utils/kate/
llvm.xml 126 <item> sdiv </item>

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