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  /toolchain/binutils/binutils-2.25/ld/testsuite/ld-sh/arch/
sh2a-nofpu-or-sh4-nommu-nofpu.s 129 shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
sh2a-or-sh3e.s 133 shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
sh2e.s 162 shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
sh3-nommu.s 140 shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
sh3.s 135 shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
sh3e.s 139 shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
sh4-nofpu.s 144 shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
sh4-nommu-nofpu.s 147 shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
sh4a-nofpu.s 151 shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
sh-dsp.s 232 shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
    [all...]
  /toolchain/binutils/binutils-2.25/opcodes/
h8500-opc.h 393 {35,'h','E','!','E',O_SHLL|O_WORD,"shll.w",1,{RN,0},2, {{0xa8,0xf8,RN },{0x1a,0xff,0 }}},
394 {35,'h','E','!','E',O_SHLL|O_WORD,"shll.w",1,{RNIND,0},2, {{0xd8,0xf8,RN },{0x1a,0xff,0 }}},
395 {35,'h','E','!','E',O_SHLL|O_WORD,"shll.w",1,{RNINC,0},2, {{0xc8,0xf8,RN },{0x1a,0xff,0 }}},
396 {35,'h','E','!','E',O_SHLL|O_WORD,"shll.w",1,{RNDEC,0},2, {{0xb8,0xf8,RN },{0x1a,0xff,0 }}},
397 {35,'h','E','!','E',O_SHLL|O_WORD,"shll.w",1,{ABS8,0},3, {{0x0d,0xff,0 },{0x00,0x00,ABS8 },{0x1a,0xff,0 }}},
398 {35,'h','E','!','E',O_SHLL|O_WORD,"shll.w",1,{RNIND_D8,0},3, {{0xe8,0xf8,RN },{0x00,0x00,DISP8 },{0x1a,0xff,0 }}},
399 {35,'h','E','!','E',O_SHLL|O_WORD,"shll.w",1,{IMM16,0},4, {{0x0c,0xff,0 },{0x00,0x00,IMM16 },{0x00,0x00,0 },{0x1a,0xff,0 }}},
400 {35,'h','E','!','E',O_SHLL|O_WORD,"shll.w",1,{ABS16,0},4, {{0x1d,0xff,0 },{0x00,0x00,ABS16 },{0x00,0x00,0 },{0x1a,0xff,0 }}},
401 {35,'h','E','!','E',O_SHLL|O_WORD,"shll.w",1,{RNIND_D16,0},4, {{0xf8,0xf8,RN },{0x00,0x00,DISP16 },{0x00,0x00,0 },{0x1a,0xff,0 }}},
402 {36,'h','E','!','E',O_SHLL|O_BYTE,"shll.b",1,{RN,0},2, {{0xa0,0xf8,RN },{0x1a,0xff,0 }}}
    [all...]
rx-decode.opc 667 /** 0110 110i mmmm rdst shll #%2, %0 */
668 ID(shll); S2C(i*16+mmmm); SR(rdst); DR(rdst); F_OSZC;
670 /** 1111 1101 0110 0010 rsrc rdst shll %2, %0 */
671 ID(shll); S2R(rsrc); SR(rdst); DR(rdst); F_OSZC;
673 /** 1111 1101 110immmm rsrc rdst shll #%2, %1, %0 */
674 ID(shll); S2C(immmm); SR(rsrc); DR(rdst); F_OSZC;
  /bionic/libm/x86_64/
s_tan.S 359 shll %cl, %r9d
392 shll $4, %edx
404 shll $16, %esi
439 shll $4, %eax
448 shll $1, %ecx
452 shll $2, %ecx
458 shll $4, %edx
    [all...]
  /external/libvpx/libvpx/vp8/common/mips/dspr2/
vp8_loopfilter_filters_dspr2.c     [all...]
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/mips/dspr2/
loopfilter_filters_dspr2.c     [all...]
  /art/compiler/utils/x86_64/
assembler_x86_64_test.cc 362 // Shll only allows CL as the shift count.
370 assembler->shll(*reg, shifter);
371 str << "shll %cl, %" << assembler_test->GetSecondaryRegisterName(*reg) << "\n";
378 DriverFn(&shll_fn, "shll");
382 DriverStr(Repeatri(&x86_64::X86_64Assembler::shll, 1U, "shll ${imm}, %{reg}"), "shlli");
    [all...]
  /external/boringssl/linux-x86_64/crypto/bn/
x86_64-mont5.S 284 shll $3,%r9d
285 shll $3+2,%r10d
746 shll $3,%r9d
747 shll $3+2,%r10d
1666 shll $3,%r9d
1667 shll $3+2,%r10d
  /external/boringssl/mac-x86_64/crypto/bn/
x86_64-mont5.S 283 shll $3,%r9d
284 shll $3+2,%r10d
745 shll $3,%r9d
746 shll $3+2,%r10d
1665 shll $3,%r9d
1666 shll $3+2,%r10d
  /external/neven/Embedded/common/src/b_BitFeatureEm/
Scanner.c 868 uint32 shlL = 32 - offL;
869 for( iL = 0; iL < sizeL; iL++ ) dstL[ iL ] = ( dstL[ iL ] >> 1 ) | ( srcL[ iL ] << shlL );
926 uint32 shlL = 32 - offL;
927 for( iL = 0; iL < sizeL; iL++ ) dstL[ iL ] = ( dstL[ iL ] >> 1 ) | ( srcL[ iL ] << shlL );
959 uint32 shlL = 32 - offL;
960 for( iL = 0; iL < sizeL; iL++ ) dstL[ iL ] = ( src0L[ iL ] >> offL ) | ( src1L[ iL ] << shlL );
    [all...]
  /external/v8/src/compiler/x64/
code-generator-x64.cc     [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/arch/
sh-dsp.s 232 shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
    [all...]
sh2a-nofpu.s 181 shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
sh2a-or-sh4.s 160 shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
sh4.s 153 shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
    [all...]
sh4a.s 155 shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
    [all...]

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1 2 3 4 5 67 8 91011>>