| /prebuilts/go/linux-x86/pkg/bootstrap/src/bootstrap/compile/internal/x86/ |
| cgen64.go | 269 gins(x86.ASHLL, &cx, &dx) // SHLL only uses bottom 5 bits of count
|
| /prebuilts/go/linux-x86/src/cmd/compile/internal/x86/ |
| cgen64.go | 266 gins(x86.ASHLL, &cx, &dx) // SHLL only uses bottom 5 bits of count
|
| /toolchain/binutils/binutils-2.25/gas/config/ |
| rx-parse.y | 163 %token SAT SATR SBB SCCND SCMPU SETPSW SHAR SHLL SHLR SMOVB SMOVF
397 | SHLL { sub_op = 2; } op_shift
870 /* 000:SHLR, 001:SHAR, 010:SHLL, 011:-, 100:ROTR, 101:REVW, 110:ROTL, 111:REVL */
1085 OPC(SHLL),
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
| illegal.s | 146 shll v0.8h, v1.8b, 16
|
| /toolchain/binutils/binutils-2.25/include/opcode/ |
| aarch64.h | 148 AARCH64_OPND_SHLL_IMM,/* Immediate shift for AdvSIMD SHLL instruction
|
| /prebuilts/go/darwin-x86/src/cmd/internal/rsc.io/x86/x86asm/testdata/ |
| decode.txt | [all...] |
| /prebuilts/go/linux-x86/src/cmd/internal/rsc.io/x86/x86asm/testdata/ |
| decode.txt | [all...] |
| /external/v8/src/crankshaft/x64/ |
| lithium-codegen-x64.cc | [all...] |
| /external/valgrind/none/tests/amd64/ |
| insn_basic.def | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsDSPInstrInfo.td | 667 class SHLL_QB_DESC : SHLL_QB_R2_DESC_BASE<"shll.qb", null_frag, immZExt3,
681 class SHLL_PH_DESC : SHLL_QB_R2_DESC_BASE<"shll.ph", null_frag, immZExt4,
[all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/i386-linux-gnu/bits/ |
| string.h | 395 "shll $16,%0\n\t"
419 "shll $16,%0\n\t"
[all...] |
| /toolchain/binutils/binutils-2.25/cpu/ |
| sh64-compact.cpu | [all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| sh-opc.h | 724 /* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up},
[all...] |
| rx-decode.c | [all...] |
| aarch64-tbl.h | 702 /* e.g. SHLL<Q> <Vd>.<Ta>, <Vn>.<Tb>, #<shift>. */
710 /* e.g. SHLL<Q> <Vd>.<Ta>, <Vn>.<Tb>, #<shift>. */
[all...] |
| /bionic/libm/x86/ |
| e_sinh.S | 128 shll $3, %edx
|
| /external/libvpx/libvpx/third_party/libyuv/source/ |
| scale_mips.cc | 395 "shll.ph $t4, $t2, 1 \n"
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64SchedCyclone.td | 493 // SHLL,SSHLL,USHLL
|
| /external/llvm/test/CodeGen/X86/ |
| vector-shuffle-128-v16.ll | [all...] |
| /external/llvm/test/MC/X86/ |
| intel-syntax.s | 722 // CHECK: shll $123, %eax
|
| /external/libjpeg-turbo/simd/ |
| jsimd_mips_dspr2.S | 928 shll.ph t1, t0, 1
[all...] |
| /art/compiler/optimizing/ |
| code_generator_x86.cc | 530 // calls to art::x86::X86Assembler::shll and
565 __ shll(index_reg, Immediate(TIMES_4));
[all...] |
| /external/boringssl/linux-x86/crypto/sha/ |
| sha1-586.S | 38 shll $6,%eax
1426 shll $6,%edx
[all...] |
| /external/boringssl/mac-x86/crypto/sha/ |
| sha1-586.S | 37 shll $6,%eax
1423 shll $6,%edx
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-vshift.ll | [all...] |
