| /external/llvm/test/CodeGen/X86/ |
| vec_align.ll | 14 %tmp6 = insertelement %f4 %tmp4, float %Z, i32 3
15 ret %f4 %tmp6
32 %tmp6 = insertelement %f4 %tmp4, float %Z, i32 3
33 ret %f4 %tmp6
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| 2006-05-08-CoalesceSubRegClass.ll | 17 %tmp6 = lshr i32 %A, 3 ; <i32> [#uses=1]
20 %tmp9 = add i32 %tmp8, %tmp6 ; <i32> [#uses=1]
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| 2006-07-31-SingleRegClass.ll | 7 define i32 @foo(i32 %__s.i.i, i32 %tmp5.i.i, i32 %tmp6.i.i, i32 %tmp7.i.i, i32 %tmp8.i.i) {
8 %tmp9.i.i = call i32 asm sideeffect "push %ebp\0Apush %ebx\0Amovl 4($2),%ebp\0Amovl 0($2), %ebx\0Amovl $1,%eax\0Aint $$0x80\0Apop %ebx\0Apop %ebp", "={ax},i,0,{cx},{dx},{si},{di}"( i32 192, i32 %__s.i.i, i32 %tmp5.i.i, i32 %tmp6.i.i, i32 %tmp7.i.i, i32 %tmp8.i.i ) ; <i32> [#uses=1]
|
| 2007-02-04-OrAddrMode.ll | 14 %tmp6 = ptrtoint i8* %ctg2 to i32 ; <i32> [#uses=1]
15 %tmp14 = or i32 %tmp6, 1 ; <i32> [#uses=1]
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| 2007-02-19-LiveIntervalAssert.ll | 11 %tmp6 = load %struct._IO_FILE*, %struct._IO_FILE** @stderr
12 %tmp7 = tail call i32 @fflush( %struct._IO_FILE* %tmp6 )
|
| 2007-05-15-maskmovq.ll | 9 %tmp6 = bitcast <1 x i64> %c64 to x86_mmx ; <x86_mmx> [#uses=1]
10 tail call void @llvm.x86.mmx.maskmovq( x86_mmx %tmp4, x86_mmx %tmp6, i8* %P )
|
| 2007-07-03-GR64ToVR64.ll | 12 %tmp6 = bitcast <1 x i64> %A to x86_mmx ; <<4 x i16>> [#uses=1]
13 %tmp7 = tail call x86_mmx @llvm.x86.mmx.paddus.w( x86_mmx %tmp6, x86_mmx %tmp4 ) ; <x86_mmx> [#uses=1]
|
| and-or-fold.ll | 12 %tmp6 = or i32 %tmp2, %tmp5
13 ret i32 %tmp6
|
| commute-intrinsic.ll | 10 %tmp6 = bitcast <2 x i64> %b to <8 x i16> ; <<8 x i16>> [#uses=1]
12 %tmp11 = tail call <4 x i32> @llvm.x86.sse2.pmadd.wd( <8 x i16> %tmp9, <8 x i16> %tmp6 ) nounwind readnone ; <<4 x i32>> [#uses=1]
|
| fastcc-sret.ll | 22 %tmp6 = load i32, i32* %tmp5
23 store i32 %tmp6, i32* @dst
|
| tailcall-multiret.ll | 13 %tmp6 = insertelement <3 x double> %tmp4, double %tmp5, i32 2
15 ret <3 x double> %tmp6
|
| vec_set.ll | 7 %tmp6 = insertelement <8 x i16> %tmp4, i16 %a3, i32 3 ; <<8 x i16>> [#uses=1]
8 %tmp8 = insertelement <8 x i16> %tmp6, i16 %a4, i32 4 ; <<8 x i16>> [#uses=1]
|
| x86-sanitizer-shrink-wrapping.ll | 32 %tmp6 = load i32, i32* inttoptr (i64 40 to i32*), align 8
33 %inc = add nsw i32 %tmp6, 1
|
| /external/llvm/test/Transforms/GVN/ |
| load-pre-licm.ll | 17 %indvar = phi i32 [ 0, %entry ], [ %tmp6, %if.end ]
20 %tmp6 = add i32 %indvar, 1
21 %arrayidx = getelementptr [5001 x i32], [5001 x i32]* @sortlist, i32 0, i32 %tmp6
34 %exitcond = icmp eq i32 %tmp6, 100
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm11_asm/ |
| h264bsd_interpolate_ver_quarter.s | 55 tmp6 RN 9 label
102 ADD tmp6, y0, partH ;// (y0+partHeight)
103 ADD tmp6, tmp6, #5 ;// (y0+partH+5)
105 CMP tmp6, height
133 MLA tmp6, width, y0, x0 ;// y0*width+x0
134 ADD ref, ref, tmp6 ;// ref += y0*width+x0
156 LDR tmp6, [ref], width ;// |t4|t3|t2|t1|
167 UXTAB16 tmpa, tmpa, tmp6 ;// 16+20(G+M)+A+T
183 UXTAB16 tmpa, tmpa, tmp6, ROR #8 ;// 16+20(G+M)+A+
[all...] |
| /external/llvm/test/Analysis/ScalarEvolution/ |
| 2007-08-06-Unsigned.ll | 20 %tmp6 = icmp ult i32 %tmp2, %y ; <i1> [#uses=1]
21 br i1 %tmp6, label %bb, label %bb8.loopexit
|
| pr24757.ll | 25 %tmp6 = trunc i32 %tmpf to i8
26 %tmp7 = icmp eq i8 %tmp6, 0
|
| trip-count2.ll | 18 %tmp6 = trunc i32 %tmp61 to i16
19 %tmp71 = shl i16 %tmp6, 2
|
| /external/llvm/test/CodeGen/ARM/ |
| 2010-06-11-vmovdrr-bitcast.ll | 10 %tmp6 = trunc i128 %srcval to i64 ; <i64> [#uses=1]
13 %tmp16.i = bitcast i64 %tmp6 to <8 x i8> ; <<8 x i8>> [#uses=1]
|
| /external/llvm/test/CodeGen/Hexagon/vect/ |
| vect-splat.ll | 11 %tmp6 = insertelement %i4 %tmp4, i32 %X, i32 3 ; <%i4> [#uses=1]
13 %R = add %i4 %q, %tmp6 ; <%i4> [#uses=1]
|
| /external/llvm/test/CodeGen/PowerPC/ |
| 2007-01-15-AsmDialect.ll | 19 %tmp6 = load i32, i32* %temp ; <i32> [#uses=1]
20 store i32 %tmp6, i32* %retval
|
| 2007-10-18-PtrArithmetic.ll | 7 %tmp6 = icmp eq i8 %.mask, 16 ; <i1> [#uses=1]
8 br i1 %tmp6, label %cond_true, label %UnifiedReturnBlock
|
| rlwinm2.ll | 17 %tmp6 = and i32 %tmp4, 127 ; <i32> [#uses=1]
18 ret i32 %tmp6
|
| /external/llvm/test/Transforms/InstCombine/ |
| bswap.ll | 23 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
26 %tmp10 = or i32 %tmp6, %tmp9 ; <i32> [#uses=1]
55 %tmp6 = bitcast i16 %tmp.upgrd.3 to i16 ; <i16> [#uses=1]
56 %tmp6.upgrd.4 = zext i16 %tmp6 to i32 ; <i32> [#uses=1]
57 %retval = trunc i32 %tmp6.upgrd.4 to i16 ; <i16> [#uses=1]
70 %tmp6 = lshr i32 %x, 24 ; <i32> [#uses=1]
71 %tmp7 = or i32 %tmp5, %tmp6 ; <i32> [#uses=1]
|
| known_align.ll | 18 %tmp6 = load i32, i32* %tmp1, align 4 ; <i32> [#uses=1]
19 store i32 %tmp6, i32* %tmp, align 4
|
