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full:xsave
(Results
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/prebuilts/clang/host/linux-x86/clang-2690385/lib64/clang/3.8/include/
xsaveintrin.h
1
/*===---- xsaveintrin.h -
XSAVE
intrinsic ------------------------------------===
32
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("
xsave
")))
/prebuilts/sdk/renderscript/clang-include/
xsaveintrin.h
1
/*===---- xsaveintrin.h -
XSAVE
intrinsic ------------------------------------===
32
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("
xsave
")))
/external/llvm/test/CodeGen/X86/
system-intrinsics-xsaves.ll
1
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+
xsave
,+xsaves | FileCheck %s
system-intrinsics-64-xsaves.ll
1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+
xsave
,+xsaves | FileCheck %s
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
arch-10.s
29
#
Xsave
x86-64-arch-2.s
29
#
Xsave
arch-10-1.l
65
[ ]*29[ ]+\#
Xsave
arch-10-2.l
64
[ ]*29[ ]+\#
Xsave
arch-10-3.l
60
[ ]*29[ ]+\#
Xsave
arch-10-4.l
58
[ ]*29[ ]+\#
Xsave
arch-10-btver1.d
2
#as: -march=btver1+avx+vmx+smx+
xsave
+xsaveopt+aes+pclmul+movbe+ept+padlock+fma+bmi+tbm
arch-10-lzcnt.d
2
#as: -march=i686+nop+avx+vmx+smx+
xsave
+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+lzcnt+padlock+bmi+tbm
arch-10-prefetchw.d
2
#as: -march=i686+nop+avx+vmx+smx+
xsave
+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+sse4a+svme+lzcnt+padlock+bmi+tbm+prfchw
/external/autotest/client/virt/
virt_utils_unittest.py
18
'xtpr', 'pdcm', 'sse4_1', '
xsave
', 'lahf_lm', 'ida',
/prebuilts/gcc/darwin-x86/x86/x86_64-linux-android-4.9/lib/gcc/x86_64-linux-android/4.9/include/
xsaveintrin.h
33
#pragma GCC target("
xsave
")
/prebuilts/gcc/linux-x86/x86/x86_64-linux-android-4.9/lib/gcc/x86_64-linux-android/4.9/include/
xsaveintrin.h
33
#pragma GCC target("
xsave
")
/external/libchrome/base/
cpu.cc
239
// b)
XSAVE
is supported by the CPU and
240
// c)
XSAVE
is enabled by the kernel.
245
// Because of that, we also test the
XSAVE
bit because its description in
249
(cpu_info[2] & 0x04000000) != 0 /*
XSAVE
*/ &&
251
(_xgetbv(0) & 6) == 6 /*
XSAVE
enabled by kernel */;
/external/kernel-headers/original/uapi/asm-x86/asm/
sigcontext.h
26
* are reserved for SW usage. On CPUs supporting
XSAVE
/XRSTOR, these bytes are
37
* larger
XSAVE
areas.
62
* Actual
XSAVE
state size, based on the xfeatures saved in the layout.
processor-flags.h
115
#define X86_CR4_OSXSAVE_BIT 18 /* enable
xsave
and xrestore */
/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/asm/
processor-flags.h
62
#define X86_CR4_OSXSAVE 0x00040000 /* enable
xsave
and xrestore */
sigcontext.h
13
* are reserved for SW usage. On cpu's supporting
xsave
/xrstor, these bytes
33
__u32 xstate_size; /* actual
xsave
state size, based on the
/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/i386-linux-gnu/asm/
processor-flags.h
63
#define X86_CR4_OSXSAVE 0x00040000 /* enable
xsave
and xrestore */
sigcontext.h
13
* are reserved for SW usage. On cpu's supporting
xsave
/xrstor, these bytes
33
__u32 xstate_size; /* actual
xsave
state size, based on the
/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/x86_64-linux-gnu/asm/
processor-flags.h
63
#define X86_CR4_OSXSAVE 0x00040000 /* enable
xsave
and xrestore */
sigcontext.h
13
* are reserved for SW usage. On cpu's supporting
xsave
/xrstor, these bytes
33
__u32 xstate_size; /* actual
xsave
state size, based on the
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