| /external/clang/test/Parser/ |
| cxx-concepts-requires-clause.cpp | 13 struct AA;
34 struct A<T>::AA { };
|
| /external/clang/test/SemaCXX/ |
| attr-noreturn.cpp | 76 struct AA {};
78 struct CC : AA {};
80 struct EE : virtual AA {};
81 struct FF : AA, virtual BB {};
84 struct II : AA {};
86 struct KK : virtual AA {};
93 AA a;
109 const AA& aa = AA(); local
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| mxu.d | 17 [0-9a-f]+ <[^>]*> 7010c84a d16mac xr1,xr2,xr3,xr4,AA,WW
18 [0-9a-f]+ <[^>]*> 7050c84a d16mac xr1,xr2,xr3,xr4,AA,LW
19 [0-9a-f]+ <[^>]*> 7090c84a d16mac xr1,xr2,xr3,xr4,AA,HW
20 [0-9a-f]+ <[^>]*> 70d0c84a d16mac xr1,xr2,xr3,xr4,AA,XW
21 [0-9a-f]+ <[^>]*> 7010c84a d16mac xr1,xr2,xr3,xr4,AA,WW
22 [0-9a-f]+ <[^>]*> 7050c84a d16mac xr1,xr2,xr3,xr4,AA,LW
23 [0-9a-f]+ <[^>]*> 7090c84a d16mac xr1,xr2,xr3,xr4,AA,HW
24 [0-9a-f]+ <[^>]*> 70d0c84a d16mac xr1,xr2,xr3,xr4,AA,XW
49 [0-9a-f]+ <[^>]*> 7010c84b d16macf xr1,xr2,xr3,xr4,AA,WW
50 [0-9a-f]+ <[^>]*> 7050c84b d16macf xr1,xr2,xr3,xr4,AA,L
[all...] |
| /art/runtime/interpreter/mterp/arm/ |
| binopWide.S | 19 mov rINST, rINST, lsr #8 @ rINST<- AA
22 VREG_INDEX_TO_ADDR r9, rINST @ r9<- &fp[AA]
|
| op_aget_wide.S | 8 mov r9, rINST, lsr #8 @ r9<- AA
22 VREG_INDEX_TO_ADDR r9, r9 @ r9<- &fp[AA]
|
| op_shl_long.S | 9 mov r9, rINST, lsr #8 @ r9<- AA
17 VREG_INDEX_TO_ADDR r9, r9 @ r9<- &fp[AA]
|
| op_shr_long.S | 9 mov r9, rINST, lsr #8 @ r9<- AA
17 VREG_INDEX_TO_ADDR r9, r9 @ r9<- &fp[AA]
|
| op_ushr_long.S | 9 mov r9, rINST, lsr #8 @ r9<- AA
17 VREG_INDEX_TO_ADDR r9, r9 @ r9<- &fp[AA]
|
| binop.S | 19 mov r9, rINST, lsr #8 @ r9<- AA
|
| binopLit8.S | 17 mov r9, rINST, lsr #8 @ r9<- AA
|
| fbinop.S | 10 mov r9, rINST, lsr #8 @ r9<- AA
|
| fbinopWide.S | 10 mov r9, rINST, lsr #8 @ r9<- AA
|
| op_const_string_jumbo.S | 5 mov r1, rINST, lsr #8 @ r1<- AA
|
| op_div_int.S | 13 mov r9, rINST, lsr #8 @ r9<- AA
|
| op_div_int_lit8.S | 13 mov r9, rINST, lsr #8 @ r9<- AA
|
| op_fill_array_data.S | 5 mov r3, rINST, lsr #8 @ r3<- AA
|
| op_rem_int.S | 15 mov r9, rINST, lsr #8 @ r9<- AA
|
| op_rem_int_lit8.S | 15 mov r9, rINST, lsr #8 @ r9<- AA
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGVLIW.cpp | 67 /// AA - AliasAnalysis for making memory reference queries.
68 AliasAnalysis *AA;
72 AliasAnalysis *aa,
74 : ScheduleDAGSDNodes(mf), AvailableQueue(availqueue), AA(aa) {
101 BuildSchedGraph(AA);
278 return new ScheduleDAGVLIW(*IS->MF, IS->AA, new ResourcePriorityQueue(IS));
|
| /art/runtime/interpreter/mterp/mips/ |
| binopLit8.S | 17 GET_OPA(rOBJ) # rOBJ <- AA
|
| fbinopWide.S | 12 GET_OPA(rOBJ) # s5 <- AA
|
| op_const_string_jumbo.S | 5 GET_OPA(a1) # a1 <- AA
|
| op_const_wide.S | 8 GET_OPA(t1) # t1 <- AA
|
| op_fill_array_data.S | 5 GET_OPA(a3) # a3 <- AA
|
| /art/runtime/interpreter/mterp/mips64/ |
| op_const_wide.S | 2 srl a4, rINST, 8 # a4 <- AA
|
