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  /external/libjpeg-turbo/simd/
jidctflt-sse2.asm 131 psrad xmm0,(DWORD_BIT-WORD_BIT) ; xmm0=in0=(00 01 02 03)
132 cvtdq2ps xmm0,xmm0 ; xmm0=in0=(00 01 02 03)
167 psrad xmm0,(DWORD_BIT-WORD_BIT) ; xmm0=in0=(00 01 02 03)
169 cvtdq2ps xmm0,xmm0 ; xmm0=in0=(00 01 02 03)
jidctint-mmx.asm 162 movq mm2,mm0 ; mm0=in0=(00 01 02 03)
218 paddw mm0,mm2 ; mm0=in0+in4
219 psubw mm6,mm2 ; mm6=in0-in4
548 paddw mm0,mm2 ; mm0=in0+in4
549 psubw mm6,mm2 ; mm6=in0-in4
    [all...]
jidctint-sse2-64.asm 152 movdqa xmm4,xmm5 ; xmm5=in0=(00 01 02 03 04 05 06 07)
205 paddw xmm0,xmm2 ; xmm0=in0+in4
206 psubw xmm6,xmm2 ; xmm6=in0-in4
545 paddw xmm7,xmm0 ; xmm7=in0+in4
546 psubw xmm3,xmm0 ; xmm3=in0-in4
    [all...]
jidctint-sse2.asm 158 movdqa xmm4,xmm5 ; xmm5=in0=(00 01 02 03 04 05 06 07)
212 paddw xmm0,xmm2 ; xmm0=in0+in4
213 psubw xmm6,xmm2 ; xmm6=in0-in4
552 paddw xmm7,xmm0 ; xmm7=in0+in4
553 psubw xmm3,xmm0 ; xmm3=in0-in4
    [all...]
jidctflt-sse.asm 131 movlhps xmm0,xmm3 ; xmm0=in0=(00 01 02 03)
192 movlhps xmm0,xmm4 ; xmm0=in0=(00 01 02 03)
jidctfst-mmx.asm 147 movq mm2,mm0 ; mm0=in0=(00 01 02 03)
jidctfst-sse2-64.asm 137 movdqa xmm7,xmm0 ; xmm0=in0=(00 01 02 03 04 05 06 07)
jidctfst-sse2.asm 143 movdqa xmm7,xmm0 ; xmm0=in0=(00 01 02 03 04 05 06 07)
jidctred-mmx.asm 169 movq mm2,mm0 ; mm0=in0=(00 01 02 03)
jidctred-sse2-64.asm 159 movdqa xmm3,xmm0 ; xmm0=in0=(00 01 02 03 04 05 06 07)
jidctred-sse2.asm 165 movdqa xmm3,xmm0 ; xmm0=in0=(00 01 02 03 04 05 06 07)
  /external/libunwind/tests/
ia64-test-nat-asm.S 40 #define CALL_NEXT(gp_save_reg) CALL_NEXT_PTR(gp_save_reg, in0, in1)
57 function passed via the pointer in in0. */
95 passed via in0. */
453 mov r8 = in0
  /external/deqp/external/vulkancts/modules/vulkan/shaderrender/
vktShaderRenderOperatorTests.cpp 183 // Reference for expression "in0, in2 + in1, in1 + in0"
184 inline Vec4 sequenceNoSideEffCase0 (const Vec4& in0, const Vec4& in1, const Vec4& in2) { DE_UNREF(in2); return in1 + in0; }
185 // Reference for expression "in0, in2 + in1, in1 + in0"
186 inline deUint32 sequenceNoSideEffCase1 (float in0, deUint32 in1, float in2) { DE_UNREF(in0); DE_UNREF(in2); return in1 + in1; }
187 // Reference for expression "in0 && in1, in0, ivec2(vec2(in0) + in2)
    [all...]
  /external/deqp/modules/gles3/functional/
es3fShaderOperatorTests.cpp 200 // Reference for expression "in0, in2 + in1, in1 + in0"
201 inline Vec4 sequenceNoSideEffCase0 (const Vec4& in0, const Vec4& in1, const Vec4& in2) { DE_UNREF(in2); return in1 + in0; }
202 // Reference for expression "in0, in2 + in1, in1 + in0"
203 inline deUint32 sequenceNoSideEffCase1 (float in0, deUint32 in1, float in2) { DE_UNREF(in0); DE_UNREF(in2); return in1 + in1; }
204 // Reference for expression "in0 && in1, in0, ivec2(vec2(in0) + in2)
    [all...]
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/x86/
vp9_loopfilter_intrin_sse2.c     [all...]
  /external/libvpx/libvpx/vpx_dsp/mips/
intrapred_msa.c 14 #define IPRED_SUBS_UH2_UH(in0, in1, out0, out1) { \
15 out0 = __msa_subs_u_h(out0, in0); \
sad_msa.c 14 #define SAD_INSVE_W4(RTYPE, in0, in1, in2, in3, out) { \
15 out = (RTYPE)__msa_insve_w((v4i32)out, 0, (v4i32)in0); \
    [all...]
  /external/webp/src/dsp/
enc_neon.c 84 static WEBP_INLINE void Transpose8x2(const int16x8_t in0, const int16x8_t in1,
88 const int16x8x2_t tmp0 = vzipq_s16(in0, in1); // a0 c0 a1 c1 a2 c2 ...
94 // {rows} = in0 | in4
104 vget_low_s16(rows->val[1])); // in0 + in8
106 vget_low_s16(rows->val[1])); // in0 - in8
    [all...]
dec_neon.c     [all...]
  /external/libvpx/libvpx/vpx_dsp/x86/
vpx_subpixel_8t_intrin_ssse3.c 346 #define TRANSPOSE_8X8(in0, in1, in2, in3, in4, in5, in6, in7, \
348 const __m128i tr0_0 = _mm_unpacklo_epi8(in0, in1); \
    [all...]
highbd_loopfilter_sse2.c     [all...]
  /external/libvpx/libvpx/vp8/common/mips/msa/
loopfilter_filters_msa.c 262 #define VP8_ST6x1_UB(in0, in0_idx, in1, in1_idx, pdst, stride) \
267 tmp0_w = __msa_copy_u_w((v4i32)in0, in0_idx); \
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  /prebuilts/tools/common/m2/repository/io/netty/netty-handler/4.1.0.CR3/
netty-handler-4.1.0.CR3.jar 
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/
regs.s 136 { .mii; mov in0 = r0; nop.i 0; nop.i 0;; }
    [all...]
  /external/valgrind/VEX/priv/
guest_arm_toIR.c 8147 static const UChar in0[16] = {1,2, 0,2, 2,1, 1,1, 0,1, 2,0, 1,0, 0,0}; local
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