| /external/libvpx/libvpx/vpx_dsp/x86/ |
| variance_mmx.c | 76 unsigned int sse0, sse1, sse2, sse3, var; local
82 b + 8 * b_stride, b_stride, &sse2, &sum2);
86 var = sse0 + sse1 + sse2 + sse3;
94 unsigned int sse0, sse1, sse2, sse3, var; local
100 b + 8 * b_stride, b_stride, &sse2, &sum2);
104 var = sse0 + sse1 + sse2 + sse3;
|
| intrapred_sse2.asm | 201 INIT_XMM sse2
234 INIT_XMM sse2
266 INIT_XMM sse2
298 INIT_XMM sse2
318 INIT_XMM sse2
360 INIT_XMM sse2
396 INIT_XMM sse2
432 INIT_XMM sse2
481 INIT_XMM sse2
497 INIT_XMM sse2
[all...] |
| highbd_intrapred_sse2.asm | 47 INIT_XMM sse2
82 INIT_XMM sse2
126 INIT_XMM sse2
196 INIT_XMM sse2
212 INIT_XMM sse2
233 INIT_XMM sse2
302 INIT_XMM sse2
347 INIT_XMM sse2
401 INIT_XMM sse2
|
| sad_sse2.asm | 84 INIT_XMM sse2
127 INIT_XMM sse2
173 INIT_XMM sse2
217 INIT_XMM sse2
|
| ssim_opt_x86_64.asm | 59 ; ( calling app will initialize to 0 ) could easily fit everything in sse2
149 ; ( calling app will initialize to 0 ) could easily fit everything in sse2
|
| highbd_sad_sse2.asm | 153 INIT_XMM sse2
220 INIT_XMM sse2
288 INIT_XMM sse2
357 INIT_XMM sse2
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/x86/ |
| variance_mmx.c | 122 unsigned int sse0, sse1, sse2, sse3, var; local
128 vp8_get8x8var_mmx(src_ptr + 8 * source_stride, source_stride, ref_ptr + 8 * recon_stride, recon_stride, &sse2, &sum2) ;
131 var = sse0 + sse1 + sse2 + sse3;
144 unsigned int sse0, sse1, sse2, sse3, var; local
150 vp8_get8x8var_mmx(src_ptr + 8 * source_stride, source_stride, ref_ptr + 8 * recon_stride, recon_stride, &sse2, &sum2) ;
153 var = sse0 + sse1 + sse2 + sse3;
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/encoder/x86/ |
| vp9_variance_avx2.c | 198 unsigned int sse2; local
202 64, &sse2);
204 sse += sse2;
239 unsigned int sse2; local
243 sec + 32, 64, 64, &sse2);
245 sse += sse2;
|
| vp9_sad_sse2.asm | 84 INIT_XMM sse2
127 INIT_XMM sse2
173 INIT_XMM sse2
217 INIT_XMM sse2
|
| /external/libvpx/libvpx/vpx_dsp/arm/ |
| variance_neon.c | 105 uint32_t sse1, sse2; local
109 &sse2, &sum2);
110 *sse = sse1 + sse2;
119 uint32_t sse1, sse2; local
123 &sse2, &sum2);
124 *sse = sse1 + sse2;
133 uint32_t sse1, sse2; local
138 &sse2, &sum2);
139 sse1 += sse2;
144 64, 16, &sse2, &sum2)
[all...] |
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/x86/ |
| vp9_asm_stubs.c | 322 FUN_CONV_1D(horiz, x_step_q4, filter_x, h, src, , sse2);
323 FUN_CONV_1D(vert, y_step_q4, filter_y, v, src - src_stride * 3, , sse2);
324 FUN_CONV_1D(avg_horiz, x_step_q4, filter_x, h, src, avg_, sse2);
325 FUN_CONV_1D(avg_vert, y_step_q4, filter_y, v, src - src_stride * 3, avg_, sse2);
337 FUN_CONV_2D(, sse2);
338 FUN_CONV_2D(avg_ , sse2);
|
| vp9_intrapred_sse2.asm | 71 INIT_XMM sse2
103 INIT_XMM sse2
171 INIT_XMM sse2
187 INIT_XMM sse2
238 INIT_XMM sse2
270 INIT_XMM sse2
308 INIT_XMM sse2
|
| /external/boringssl/src/crypto/bn/asm/ |
| bn-586.pl | 9 $sse2=0;
10 for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
12 &external_label("OPENSSL_ia32cap_P") if ($sse2);
28 &function_begin_B($name,$sse2?"EXTRN\t_OPENSSL_ia32cap_P:DWORD":"");
34 if ($sse2) {
214 &function_begin_B($name,$sse2?"EXTRN\t_OPENSSL_ia32cap_P:DWORD":"");
220 if ($sse2) {
325 &function_begin_B($name,$sse2?"EXTRN\t_OPENSSL_ia32cap_P:DWORD":"");
331 if ($sse2) {
|
| x86-mont.pl | 13 # First of all non-SSE2 path should be implemented (yes, for now it
14 # performs Montgomery multiplication/convolution only on SSE2-capable
25 # Modulo-scheduling SSE2 loops results in further 15-20% improvement.
35 $sse2=0;
36 for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
38 &external_label("OPENSSL_ia32cap_P") if ($sse2);
107 if($sse2) {
|
| /external/flac/libFLAC/include/private/ |
| cpu.h | 124 FLAC__bool sse2; member in struct:__anon12089
|
| /external/llvm/test/Instrumentation/AddressSanitizer/X86/ |
| asm_mov.s | 1 # RUN: llvm-mc %s -triple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+sse2 -asm-instrumentation=address -asan-instrument-assembly | FileCheck %s
|
| /external/libvpx/libvpx/build/make/ |
| rtcd.pl | 364 @ALL_ARCHS = filter(qw/mmx sse sse2 sse3 ssse3 sse4_1 avx avx2/);
367 @ALL_ARCHS = filter(qw/mmx sse sse2 sse3 ssse3 sse4_1 avx avx2/);
368 @REQUIRES = filter(keys %required ? keys %required : qw/mmx sse sse2/);
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/build/make/ |
| rtcd.pl | 358 @ALL_ARCHS = filter(qw/mmx sse sse2 sse3 ssse3 sse4_1 avx avx2/);
361 @ALL_ARCHS = filter(qw/mmx sse sse2 sse3 ssse3 sse4_1 avx avx2/);
362 @REQUIRES = filter(keys %required ? keys %required : qw/mmx sse sse2/);
|
| /external/libvpx/libvpx/vp9/encoder/x86/ |
| vp9_error_sse2.asm | 20 INIT_XMM sse2
82 INIT_XMM sse2
|
| vp9_highbd_error_sse2.asm | 23 INIT_XMM sse2
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/test/ |
| variance_test.cc | 140 unsigned int sse1, sse2; local
144 log2height_, &sse2);
145 EXPECT_EQ(sse1, sse2);
247 unsigned int sse1, sse2; local
252 log2height_, x, y, &sse2);
253 EXPECT_EQ(sse1, sse2) << "at position " << x << ", " << y;
270 unsigned int sse1, sse2; local
276 x, y, &sse2);
277 EXPECT_EQ(sse1, sse2) << "at position " << x << ", " << y;
345 SSE2, VP8VarianceTest
[all...] |
| /external/libvpx/libvpx/test/ |
| variance_test.cc | 322 unsigned int sse1, sse2; local
329 stride_coeff, &sse2,
331 EXPECT_EQ(sse1, sse2);
354 unsigned int sse1, sse2; local
362 ref_stride_coeff, &sse2,
364 EXPECT_EQ(sse1, sse2);
439 unsigned int sse1, sse2; local
443 stride_coeff, &sse2, false, VPX_BITS_8);
444 EXPECT_EQ(sse1, sse2);
455 unsigned int sse2; local
638 unsigned int sse1, sse2; local
675 unsigned int sse1, sse2; local
711 unsigned int sse1, sse2; local
[all...] |
| /external/flac/libFLAC/ |
| cpu.c | 50 info->ia32.sse2 = false;
178 info->ia32.sse2 = (flags_edx & FLAC__CPUINFO_IA32_CPUID_SSE2 )? true : false;
197 fprintf(stderr, " SSE2 ....... %c\n", info->ia32.sse2 ? 'Y' : 'n');
232 else { /* double-check SSE2 */
|
| /bionic/libc/arch-x86_64/string/ |
| sse2-memset-slm.S | 67 .section .text.sse2,"ax",@progbits
|
| /external/valgrind/memcheck/tests/amd64/ |
| sse_memory.c | 2 /* A program to test that SSE/SSE2 insns do not read memory they
226 //TEST_INSN( &AllMask, 0,pavgb) -- dup with sse2?
227 //TEST_INSN( &AllMask, 0,pavgw) -- dup with sse2?
230 //TEST_INSN( &AllMask, 0,pmaxsw) -- dup with sse2?
231 //TEST_INSN( &AllMask, 0,pmaxub) -- dup with sse2?
232 //TEST_INSN( &AllMask, 0,pminsw) -- dup with sse2?
233 //TEST_INSN( &AllMask, 0,pminub) -- dup with sse2?
235 //TEST_INSN( &AllMask, 0,pmulhuw) -- dup with sse2?
236 TEST_INSN( &AllMask, 16,psadbw) // -- XXXXXXXXXXXXXXXX sse2 (xmm variant) not implemented!
253 /* ------------------------ SSE2 ------------------------ *
391 Int sse1 = 0, sse2 = 0; local
[all...] |
