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  /external/libvpx/libvpx/vpx_dsp/x86/
inv_wht_sse2.asm 83 INIT_XMM sse2
subtract_sse2.asm 20 INIT_XMM sse2
sad4d_sse2.asm 216 INIT_XMM sse2
vpx_convolve_copy_sse2.asm 16 INIT_XMM sse2
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/encoder/x86/
vp9_error_sse2.asm 18 INIT_XMM sse2
vp9_subtract_sse2.asm 20 INIT_XMM sse2
vp9_ssim_opt.asm 59 ; ( calling app will initialize to 0 ) could easily fit everything in sse2
149 ; ( calling app will initialize to 0 ) could easily fit everything in sse2
vp9_sad4d_sse2.asm 216 INIT_XMM sse2
  /system/core/libcutils/arch-x86/
android_memset32.S 129 .section .text.sse2,"ax",@progbits
150 .pushsection .rodata.sse2,"a",@progbits
393 .pushsection .rodata.sse2,"a",@progbits
android_memset16.S 129 .section .text.sse2,"ax",@progbits
153 .pushsection .rodata.sse2,"a",@progbits
479 .pushsection .rodata.sse2,"a",@progbits
  /system/core/libcutils/arch-x86_64/
android_memset32.S 65 .section .text.sse2,"ax",@progbits
78 .pushsection .rodata.sse2,"a",@progbits
260 .pushsection .rodata.sse2,"a",@progbits
android_memset16.S 65 .section .text.sse2,"ax",@progbits
81 .pushsection .rodata.sse2,"a",@progbits
340 .pushsection .rodata.sse2,"a",@progbits
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/x86/
vp9_copy_sse2.asm 16 INIT_XMM sse2
  /external/boringssl/src/crypto/sha/asm/
sha512-586.pl 14 # Add SSSE3 code path, 20-25% improvement [over original SSE2 code].
41 # to 50%, but it's less important as they are expected to execute SSE2
43 # code]. SSE2 code-path is as fast as original sha512-sse2.pl, even
45 # SSE2-aware kernel is no longer required to execute the code. Another
55 $sse2=0;
56 for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
58 &external_label("OPENSSL_ia32cap_P") if ($sse2);
304 if ($sse2) {
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/x86/
ssim_opt.asm 59 ; ( calling app will initialize to 0 ) could easily fit everything in sse2
149 ; ( calling app will initialize to 0 ) could easily fit everything in sse2
  /external/libvpx/libvpx/vp8/encoder/
rdopt.c 479 unsigned int sse2 = 0; local
505 mv_col & 7, mv_row & 7, upred_ptr, uv_stride, &sse2);
508 sse2 += sse1;
513 upred_ptr, uv_stride, &sse2);
516 sse2 += sse1;
518 return sse2;
1801 unsigned int sse2 = VP8_UVSSE(x); local
    [all...]
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/
rdopt.c 478 unsigned int sse2 = 0; local
504 mv_col & 7, mv_row & 7, upred_ptr, uv_stride, &sse2);
507 sse2 += sse1;
512 upred_ptr, uv_stride, &sse2);
515 sse2 += sse1;
517 return sse2;
1800 unsigned int sse2 = VP8_UVSSE(x); local
    [all...]
pickinter.c 475 unsigned int sse2 = 0; local
477 sse2 = VP8_UVSSE(x);
479 if (sse2 * 2 < x->encode_breakout)
    [all...]
  /external/elfutils/tests/
run-readelf-mixed-corenote.sh 257 HWCAP: 0xafebfbff <fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss tm pbe>
459 HWCAP: 0x780abfd <fpu de pse tsc msr pae mce cx8 apic sep pge cmov mmx fxsr sse sse2>
530 HWCAP: 0xbfebfbff <fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe>
  /bionic/libc/arch-x86/silvermont/string/
sse2-memcpy-slm.S 96 .section .text.sse2,"ax",@progbits
sse2-strlen-slm.S 85 .section .text.sse2,"ax",@progbits
  /bionic/libc/arch-x86_64/string/
sse2-memcpy-slm.S 91 .section .text.sse2,"ax",@progbits
sse2-strlen-slm.S 64 .section .text.sse2,"ax",@progbits
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/x86/
recon_sse2.asm 384 %ifidn %1, sse2
400 %ifidn %1, sse2
430 vp8_intra_pred_uv_tm sse2
915 %ifidn %1, sse2
931 %ifidn %1, sse2
967 vp8_intra_pred_y_tm sse2
  /bionic/libc/arch-x86/atom/string/
sse2-memset-atom.S 145 .section .text.sse2,"ax",@progbits
169 .pushsection .rodata.sse2,"a",@progbits
451 .pushsection .rodata.sse2,"a",@progbits

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