/external/llvm/include/llvm/Analysis/ |
ScalarEvolutionExpander.h | 239 /// \brief Arrange for there to be a cast of V to Ty at IP, reusing an 245 BasicBlock::iterator IP);
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/external/mesa3d/docs/ |
MESA_texture_signed_rgba.spec | 17 IP Status 19 No known IP issues
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MESA_drm_image.spec | 39 IP Status
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MESA_multithread_makecurrent.spec | 48 IP Status
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/system/extras/tests/net_test/ |
ping6_test.py | 79 layers = ["IP", "ICMP", scapy.ICMPv6EchoRequest] 96 src = packet.getlayer(scapy.IP).src 98 scapy.IP(src=self.INTERMEDIATE_IPV4, dst=src) / 108 def IPv4Packet(self, ip): 109 icmp = ip.getlayer(scapy.ICMP) 112 if (ip.proto != IPPROTO_ICMP or 118 if not self.ChecksumValid(ip): 121 if ip.ttl < self.MIN_TTL: 122 self.SendTimeExceeded(4, ip) 126 self.SwapAddresses(ip) [all...] |
/art/compiler/optimizing/ |
intrinsics_arm.cc | 551 __ add(IP, base, ShifterOperand(offset)); 554 __ ldrexd(trg_lo, trg_hi, IP); 556 __ ldrd(trg_lo, Address(IP)); 710 __ add(IP, base, ShifterOperand(offset)); 713 __ ldrexd(temp_lo, temp_hi, IP); 714 __ strexd(temp_lo, value_lo, value_hi, IP); 718 __ add(IP, base, ShifterOperand(offset)); 719 __ strd(value_lo, Address(IP)); [all...] |
/external/chromium-trace/catapult/third_party/gsutil/third_party/boto/boto/opsworks/ |
layer1.py | 164 Associates one of the stack's registered Elastic IP addresses 176 :param elastic_ip: The Elastic IP address. [all...] |
/external/llvm/lib/TableGen/ |
Record.cpp | 273 void *IP = nullptr; 274 if (BitsInit *I = ThePool.FindNodeOrInsertPos(ID, IP)) 278 ThePool.InsertNode(I, IP); 485 void *IP = nullptr; 486 if (ListInit *I = ThePool.FindNodeOrInsertPos(ID, IP)) 490 ThePool.InsertNode(I, IP); [all...] |
/external/llvm/lib/IR/ |
LegacyPassManager.cpp | 588 void *IP = nullptr; 589 if (auto *N = UniqueAnalysisUsages.FindNodeOrInsertPos(ID, IP)) 593 UniqueAnalysisUsages.InsertNode(Node, IP); 677 if (ImmutablePass *IP = P->getAsImmutablePass()) { 684 addImmutablePass(IP); 685 DM->recordAvailableAnalysis(IP); [all...] |
/external/clang/tools/driver/ |
cc1as_main.cpp | 375 MCInstPrinter *IP = TheTarget->createMCInstPrinter( 386 /*useDwarfDirectory*/ true, IP, CE, MAB, Opts.ShowInst));
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/external/llvm/lib/Transforms/Scalar/ |
PlaceSafepoints.cpp | [all...] |
/external/llvm/include/llvm/DebugInfo/PDB/ |
PDBTypes.h | 403 IP = 31,
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/external/tcpdump/ |
print-telnet.c | 78 #define IP 244 /* interrupt process--permanently */ 93 "SE", "NOP", "DMARK", "BRK", "IP", "AO", "AYT", "EC", 236 #define SLC_NAMELIST "0", "SYNCH", "BRK", "IP", "AO", "AYT", "EOR", \
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/device/google/contexthub/firmware/inc/platform/stm32f4xx/cmsis/ |
core_cm3.h | 328 __IO uint8_t IP[240]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
[all...] |
core_cm4.h | 375 __IO uint8_t IP[240]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
[all...] |
core_sc300.h | 328 __IO uint8_t IP[240]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
[all...] |
core_cm7.h | 390 __IO uint8_t IP[240]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
[all...] |
/external/boringssl/src/crypto/des/ |
des.c | 387 IP(r, l); 508 IP(l, r); 527 IP(l, r);
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/external/valgrind/coregrind/ |
m_errormgr.c | 324 static void printSuppForIp_XML(UInt n, Addr ip, void* uu_opaque) 327 InlIPCursor* iipc = VG_(new_IIPC)(ip); 329 if ( VG_(get_fnname_no_cxx_demangle) (ip, &buf, iipc) ) { 332 if ( VG_(get_objname)(ip, &buf) ) { 341 static void printSuppForIp_nonXML(UInt n, Addr ip, void* textV) 345 InlIPCursor* iipc = VG_(new_IIPC)(ip); 347 if ( VG_(get_fnname_no_cxx_demangle) (ip, &buf, iipc) ) { 350 if ( VG_(get_objname)(ip, &buf) ) { [all...] |
/art/compiler/utils/arm/ |
assembler_thumb2_test.cc | 288 __ StoreToOffset(type, arm::IP, arm::SP, offset); 289 __ StoreToOffset(type, arm::IP, arm::R5, offset); 293 "str ip, [sp, #4092]\n" 294 "str ip, [r5, #4092]\n"; 304 __ StoreToOffset(type, arm::IP, arm::SP, offset); 305 __ StoreToOffset(type, arm::IP, arm::R5, offset); 308 "add.w ip, sp, #4096\n" // AddConstant(ip, sp, 4096) 309 "str r0, [ip, #0]\n" 313 "str ip, [r5, #4]\n" // StoreToOffset(type, ip, r5, 4100 & 0xfff [all...] |
/external/antlr/antlr-3.4/runtime/Ruby/lib/antlr3/debug/ |
socket.rb | 260 over an IP socket.
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/external/libunwind/doc/ |
libunwind-ia64.tex | 83 (IP), this means there are three frame registers: 85 \item[\Const{UNW\_IA64\_IP}:] Contains the instruction pointer (IP, or
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/external/mesa3d/src/gallium/drivers/r300/compiler/ |
radeon_dataflow_deadcode.c | 155 struct instruction_state * insts = &s->Instructions[inst->IP]; 219 unsigned int ip; local 312 ip = 0; 315 inst = inst->Next, ++ip) { 324 inst->U.I.DstReg.WriteMask = s.Instructions[ip].WriteMask; 325 if (s.Instructions[ip].WriteMask) 328 if (s.Instructions[ip].WriteALUResult) 341 usemask = s.Instructions[ip].WriteMask;
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
inst.s | 18 movgt ip, sp 133 mlas r3, r4, r9, IP
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/external/clang/lib/Parse/ |
ParseStmtAsm.cpp | 554 std::unique_ptr<llvm::MCInstPrinter> IP( 577 MII.get(), IP.get(), Callback))
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