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  /external/mesa3d/src/gallium/drivers/radeon/
AMDGPUAsmPrinter.cpp 63 MachineBasicBlock &MBB = *BB;
64 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
  /external/llvm/include/llvm/Target/
TargetInstrInfo.h 265 virtual void reMaterialize(MachineBasicBlock &MBB,
431 /// Analyze the branching code at the end of MBB, returning
456 virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
495 /// Analyze the branching code at the end of MBB and parse it into the
502 virtual bool AnalyzeBranchPredicate(MachineBasicBlock &MBB,
508 /// Remove the branching code at the end of the specific MBB.
511 virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const {
525 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
574 virtual bool isLegalToSplitMBBAt(MachineBasicBlock &MBB,
585 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles
    [all...]
  /external/llvm/lib/CodeGen/
EarlyIfConversion.cpp 140 /// Return true if all non-terminator instructions in MBB can be safely
142 bool canSpeculateInstrs(MachineBasicBlock *MBB);
165 /// canConvertIf - If the sub-CFG headed by MBB can be if-converted,
167 bool canConvertIf(MachineBasicBlock *MBB);
176 /// canSpeculateInstrs - Returns true if all the instructions in MBB can safely
184 bool SSAIfConv::canSpeculateInstrs(MachineBasicBlock *MBB) {
187 if (!MBB->livein_empty()) {
188 DEBUG(dbgs() << "BB#" << MBB->getNumber() << " has live-ins.\n");
196 for (MachineBasicBlock::iterator I = MBB->begin(),
197 E = MBB->getFirstTerminator(); I != E; ++I)
    [all...]
MachineBlockFrequencyInfo.cpp 1 //===- MachineBlockFrequencyInfo.cpp - MBB Frequency Analysis -------------===//
171 getBlockFreq(const MachineBasicBlock *MBB) const {
172 return MBFI ? MBFI->getBlockFreq(MBB) : 0;
187 const MachineBasicBlock *MBB) const {
188 return MBFI ? MBFI->printBlockFreq(OS, MBB) : OS;
OptimizePHIs.cpp 56 bool OptimizeBB(MachineBasicBlock &MBB);
157 bool OptimizePHIs::OptimizeBB(MachineBasicBlock &MBB) {
160 MII = MBB.begin(), E = MBB.end(); MII != E; ) {
StackColoring.cpp 196 for (MachineBasicBlock *MBB : depth_first(MF)) {
197 DEBUG(dbgs() << "Inspecting block #" << BasicBlocks.lookup(MBB) << " ["
198 << MBB->getName() << "]\n");
200 LivenessMap::const_iterator BI = BlockLiveness.find(MBB);
233 for (MachineBasicBlock *MBB : depth_first(MF)) {
236 BasicBlocks[MBB] = BasicBlockNumbering.size();
237 BasicBlockNumbering.push_back(MBB);
240 BlockLifetimeInfo &BlockInfo = BlockLiveness[MBB];
245 for (MachineInstr &MI : *MBB) {
376 for (const MachineBasicBlock &MBB : *MF)
    [all...]
LexicalScopes.cpp 59 for (const auto &MBB : *MF) {
63 for (const auto &MInsn : MBB) {
279 for (const auto &MBB : *MF)
280 MBBs.insert(&MBB);
295 bool LexicalScopes::dominates(const DILocation *DL, MachineBasicBlock *MBB) {
301 if (Scope == CurrentFnLexicalScope && MBB->getParent() == MF)
305 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); I != E;
TargetInstrInfo.cpp 64 void TargetInstrInfo::insertNoop(MachineBasicBlock &MBB,
105 MachineBasicBlock *MBB = Tail->getParent();
107 // Remove all the old successors of MBB from the CFG.
108 while (!MBB->succ_empty())
109 MBB->removeSuccessor(MBB->succ_begin());
111 // Remove all the dead instructions from the end of MBB.
112 MBB->erase(Tail, MBB->end());
114 // If MBB isn't immediately before MBB, insert a branch to it
    [all...]
  /external/llvm/lib/Target/AArch64/
AArch64A57FPLoadBalancing.cpp 138 bool runOnBasicBlock(MachineBasicBlock &MBB);
139 bool colorChainSet(std::vector<Chain*> GV, MachineBasicBlock &MBB,
141 bool colorChain(Chain *G, Color C, MachineBasicBlock &MBB);
142 int scavengeRegister(Chain *G, Color C, MachineBasicBlock &MBB);
322 for (auto &MBB : F) {
323 Changed |= runOnBasicBlock(MBB);
329 bool AArch64A57FPLoadBalancing::runOnBasicBlock(MachineBasicBlock &MBB) {
331 DEBUG(dbgs() << "Running on MBB: " << MBB << " - scanning instructions...\n");
341 for (auto &MI : MBB)
    [all...]
AArch64CollectLOH.cpp 230 /// Given a couple (MBB, reg) get the corresponding set of instruction from
237 const MachineBasicBlock &MBB, unsigned reg,
240 BlockToSetOfInstrsPerColor::iterator it = sets.find(&MBB);
244 result = (sets[&MBB] = make_unique<SetOfMachineInstr[]>(nbRegs)).get();
291 for (const MachineBasicBlock &MBB : MF) {
292 auto &BBGen = Gen[&MBB];
296 BitVector &BBKillSet = Kill[&MBB];
298 for (const MachineInstr &MI : MBB) {
317 getSet(ReachableUses, MBB, CurReg, NbReg).insert(&MI);
377 if (!ADRPMode && DummyOp && !MBB.succ_empty()
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  /external/llvm/lib/Target/MSP430/
MSP430RegisterInfo.cpp 110 MachineBasicBlock &MBB = *MI.getParent();
111 MachineFunction &MF = *MBB.getParent();
145 BuildMI(MBB, std::next(II), dl, TII.get(MSP430::SUB16ri), DstReg)
148 BuildMI(MBB, std::next(II), dl, TII.get(MSP430::ADD16ri), DstReg)
  /external/llvm/lib/Target/PowerPC/
PPCMIPeephole.cpp 85 for (MachineBasicBlock &MBB : *MF) {
86 for (MachineInstr &MI : MBB) {
140 BuildMI(MBB, &MI, MI.getDebugLoc(),
165 BuildMI(MBB, &MI, MI.getDebugLoc(),
PPCFastISel.cpp 296 if (FuncInfo.MBBMap[I->getParent()] == FuncInfo.MBB)
311 FuncInfo.MBBMap[I->getParent()] == FuncInfo.MBB) {
430 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::ADDI8),
537 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg)
545 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg)
569 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg)
670 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc))
681 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc))
702 auto MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc))
751 MachineBasicBlock *BrBB = FuncInfo.MBB;
    [all...]
PPCInstrInfo.cpp 420 void PPCInstrInfo::insertNoop(MachineBasicBlock &MBB,
434 BuildMI(MBB, MI, DL, get(Opcode));
445 bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
452 MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
453 if (I == MBB.end())
463 if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
525 if (SecondLastInst && I != MBB.begin() &&
607 unsigned PPCInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
608 MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
609 if (I == MBB.end()
    [all...]
PPCVSXFMAMutate.cpp 64 bool processBlock(MachineBasicBlock &MBB) {
67 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
69 for (MachineBasicBlock::iterator I = MBB.begin(), IE = MBB.end();
304 AddendSrcRange.extendInBlock(LIS->getMBBStartIdx(&MBB),
  /external/llvm/include/llvm/CodeGen/
LivePhysRegs.h 119 /// \brief Adds all live-in registers of basic block @p MBB; After prologue/
122 void addLiveIns(const MachineBasicBlock *MBB, bool AddPristines = false);
124 /// \brief Adds all live-out registers of basic block @p MBB; After prologue/
126 void addLiveOuts(const MachineBasicBlock *MBB,
MachineBasicBlock.h 457 /// one. This is usually done when the current update on this MBB is done, and
460 /// MBB::removeSuccessor() has an option to do this automatically.
487 /// Transfers all the successors from MBB to this machine basic block (i.e.,
499 /// Return true if the specified MBB is a predecessor of this block.
500 bool isPredecessor(const MachineBasicBlock *MBB) const;
502 /// Return true if the specified MBB is a successor of this block.
503 bool isSuccessor(const MachineBasicBlock *MBB) const;
505 /// Return true if the specified MBB will be emitted immediately after this
507 /// transfer to the specified MBB. Note that MBB need not be a successor a
    [all...]
MachineTraceMetrics.h 107 /// Get the fixed resource information about MBB. Compute it on demand.
110 /// Get the scaled number of cycles used per processor resource in MBB.
332 void invalidate(const MachineBasicBlock *MBB);
335 /// Get the trace that passes through MBB.
337 Trace getTrace(const MachineBasicBlock *MBB);
353 /// Invalidate cached information about MBB. This must be called *before* MBB
356 /// This invalidates per-block information about resource usage for MBB only,
358 /// through MBB.
361 void invalidate(const MachineBasicBlock *MBB);
    [all...]
  /external/llvm/lib/Target/X86/
X86FloatingPoint.cpp 121 static unsigned calcLiveInMask(MachineBasicBlock *MBB) {
123 for (const auto &LI : MBB->liveins()) {
134 MachineBasicBlock *MBB; // Current basic block
153 // Set up our stack model to match the incoming registers to MBB.
206 DebugLoc dl = I == MBB->end() ? DebugLoc() : I->getDebugLoc();
221 BuildMI(*MBB, I, dl, TII->get(X86::XCH_F)).addReg(STReg);
226 DebugLoc dl = I == MBB->end() ? DebugLoc() : I->getDebugLoc();
230 BuildMI(*MBB, I, dl, TII->get(X86::LD_Frr)).addReg(STReg);
257 bool processBasicBlock(MachineFunction &MF, MachineBasicBlock &MBB);
277 void setKillFlags(MachineBasicBlock &MBB) const
    [all...]
X86FastISel.cpp 422 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg);
449 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
515 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc));
549 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc));
653 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), LoadReg);
659 // Prevent loading GV stub multiple times in same MBB.
699 FuncInfo.MBBMap[I->getParent()] == FuncInfo.MBB) {
882 InMBB = I->getParent() == FuncInfo.MBB->getBasicBlock();
    [all...]
  /external/llvm/lib/CodeGen/SelectionDAG/
FastISel.cpp 99 // Instructions are appended to FuncInfo.MBB. If the basic block already
103 if (!FuncInfo.MBB->empty())
104 EmitStartPt = &FuncInfo.MBB->back();
256 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
341 FuncInfo.MBB = FuncInfo.InsertPt->getParent();
344 FuncInfo.InsertPt = FuncInfo.MBB->getFirstNonPHI();
347 while (FuncInfo.InsertPt != FuncInfo.MBB->end() &&
374 if (FuncInfo.InsertPt != FuncInfo.MBB->begin())
651 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AdjStackDown));
657 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc
    [all...]
  /external/llvm/lib/Target/ARM/
ARMExpandPseudoInsts.cpp 60 bool ExpandMI(MachineBasicBlock &MBB,
62 bool ExpandMBB(MachineBasicBlock &MBB);
68 void ExpandMOV32BitImm(MachineBasicBlock &MBB,
379 MachineBasicBlock &MBB = *MI.getParent();
386 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
444 MachineBasicBlock &MBB = *MI.getParent();
451 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
497 MachineBasicBlock &MBB = *MI.getParent();
505 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
587 MachineBasicBlock &MBB = *MI.getParent()
    [all...]
ARMFastISel.cpp 294 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II,
297 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
299 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
320 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, ResultReg)
324 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
327 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
350 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, ResultReg)
355 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
359 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
378 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, ResultReg
    [all...]
ARMBaseRegisterInfo.cpp 381 emitLoadConstPool(MachineBasicBlock &MBB,
387 MachineFunction &MF = *MBB.getParent();
394 BuildMI(MBB, MBBI, dl, TII.get(ARM::LDRcp))
557 materializeFrameBaseRegister(MachineBasicBlock *MBB,
560 ARMFunctionInfo *AFI = MBB->getParent()->getInfo<ARMFunctionInfo>();
564 MachineBasicBlock::iterator Ins = MBB->begin();
566 if (Ins != MBB->end())
569 const MachineFunction &MF = *MBB->getParent();
570 MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
575 MachineInstrBuilder MIB = BuildMI(*MBB, Ins, DL, MCID, BaseReg
    [all...]
ARMConstantPoolValue.cpp 227 const MachineBasicBlock *mbb,
233 MBB(mbb) {}
236 const MachineBasicBlock *mbb,
239 return new ARMConstantPoolMBB(C, mbb, ID, PCAdj, ARMCP::no_modifier, false);
249 return ACPMBB && ACPMBB->MBB == MBB &&
254 ID.AddPointer(MBB);
259 O << "BB#" << MBB->getNumber();

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