| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| omxVCM4P10_PredictIntra_4x4_s.S | 114 VMOV.I8 d0,#0x80
|
| /external/libhevc/common/arm/ |
| ihevc_sao_band_offset_chroma.s | 141 VMOV.I8 D30,#16 @vdup_n_u8(16)
224 VMOV.I8 D29,#16 @vdup_n_u8(16)
|
| /external/libopus/celt/arm/ |
| celt_pitch_xcorr_arm.s | 80 ; Unlike VMOV, VAND is a data processsing instruction (and doesn't get
81 ; assembled to VMOV, like VORR would), so it dual-issues with the prior VLD1.
172 VMOV.S32 q15, #1
204 VMOV.I32 q0, #0
249 VMOV.32 r0, d30[0]
|
| /external/pcre/dist/sljit/ |
| sljitNativeARM_T2_32.c | 177 #define VMOV 0xee000a10
[all...] |
| sljitNativeARM_32.c | 110 #define VMOV 0xee000a10
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
| omxVCM4P10_PredictIntra_16x16_s.s | 312 VMOV qOut, #128
|
| omxVCM4P10_PredictIntra_4x4_s.s | 292 VMOV dConst128U8,#0x80 ;// 0x8080808080808080 if(count == 0)
|
| /external/valgrind/none/tests/arm/ |
| vfp.stdout.exp | 51 ---- VMOV (ARM core register to scalar) ----
52 vmov.32 d0[0], r5 :: Dd 0x55555555 0x41500000 Dm 0x41500000
53 vmov.32 d1[1], r6 :: Dd 0x00000012 0x55555555 Dm 0x00000012
54 vmov.32 d20[0], r5 :: Dd 0x55555555 0x7fc00000 Dm 0x7fc00000
55 vmov.32 d29[1], r6 :: Dd 0x432c0000 0x55555555 Dm 0x432c0000
56 vmov.32 d30[0], r5 :: Dd 0x55555555 0x7f800000 Dm 0x7f800000
57 vmov.32 d11[1], r6 :: Dd 0xff800000 0x55555555 Dm 0xff800000
58 vmov.32 d18[0], r5 :: Dd 0x55555555 0x55555555 Dm 0x44234000
59 vmov.32 d9[1], r6 :: Dd 0x0000000c 0x55555555 Dm 0x0000000c
60 vmov.16 d0[0], r5 :: Dd 0x55555555 0x5555000d Dm 0x0000000
[all...] |
| neon64.stdout.exp | 1 ----- VMOV (immediate) -----
2 vmov.i32 d0, #0x7 :: Qd 0x00000007 0x00000007
3 vmov.i32 d0, #0x7 :: Qd 0x00000007 0x00000007
4 vmov.i16 d1, #0x7 :: Qd 0x00070007 0x00070007
5 vmov.i16 d1, #0x7 :: Qd 0x00070007 0x00070007
6 vmov.i8 d2, #0x7 :: Qd 0x07070707 0x07070707
7 vmov.i8 d2, #0x7 :: Qd 0x07070707 0x07070707
8 vmov.i32 d5, #0x700 :: Qd 0x00000700 0x00000700
9 vmov.i32 d5, #0x700 :: Qd 0x00000700 0x00000700
10 vmov.i16 d7, #0x700 :: Qd 0x07000700 0x0700070
[all...] |
| neon128.stdout.exp | 1 ----- VMOV (immediate) -----
2 vmov.i32 q0, #0x7 :: Qd 0x00000007 0x00000007 0x00000007 0x00000007
3 vmov.i32 q0, #0x7 :: Qd 0x00000007 0x00000007 0x00000007 0x00000007
4 vmov.i16 q1, #0x7 :: Qd 0x00070007 0x00070007 0x00070007 0x00070007
5 vmov.i16 q1, #0x7 :: Qd 0x00070007 0x00070007 0x00070007 0x00070007
6 vmov.i8 q2, #0x7 :: Qd 0x07070707 0x07070707 0x07070707 0x07070707
7 vmov.i8 q2, #0x7 :: Qd 0x07070707 0x07070707 0x07070707 0x07070707
8 vmov.i32 q5, #0x700 :: Qd 0x00000700 0x00000700 0x00000700 0x00000700
9 vmov.i32 q5, #0x700 :: Qd 0x00000700 0x00000700 0x00000700 0x00000700
10 vmov.i16 q7, #0x700 :: Qd 0x07000700 0x07000700 0x07000700 0x0700070
[all...] |
| /external/llvm/test/MC/ARM/ |
| simple-fp-encoding.s | 144 vmov.f32 r1, s2
145 vmov.f32 s4, r3
146 vmov.f64 r1, r5, d2
147 vmov.f64 d4, r3, r9
149 @ CHECK: vmov r1, s2 @ encoding: [0x10,0x1a,0x11,0xee]
150 @ CHECK: vmov s4, r3 @ encoding: [0x10,0x3a,0x02,0xee]
151 @ CHECK: vmov r1, r5, d2 @ encoding: [0x12,0x1b,0x55,0xec]
152 @ CHECK: vmov d4, r3, r9 @ encoding: [0x14,0x3b,0x49,0xec]
176 vmov.f64 d16, #3.000000e+00
177 vmov.f32 s0, #3.000000e+0
[all...] |
| /toolchain/binutils/binutils-2.25/gas/config/ |
| tc-arm.c | 412 /* Note: we abuse "regisimm" to mean "is Neon register" in VMOV
946 immediates, as can be used in Neon VMVN and VMOV immediate instructions. */
[all...] |
