HomeSort by relevance Sort by last modified time
    Searched refs:to4 (Results 26 - 43 of 43) sorted by null

12

  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
avx512ifma_vl.d 29 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 30[ ]*vpmadd52luq \(%eax\)\{1to4\},%ymm5,%ymm6\{%k7\}
34 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 72 7f[ ]*vpmadd52luq 0x3f8\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\}
35 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 b2 00 04 00 00[ ]*vpmadd52luq 0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\}
36 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 72 80[ ]*vpmadd52luq -0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\}
37 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 b2 f8 fb ff ff[ ]*vpmadd52luq -0x408\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\}
55 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 30[ ]*vpmadd52huq \(%eax\)\{1to4\},%ymm5,%ymm6\{%k7\}
60 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 72 7f[ ]*vpmadd52huq 0x3f8\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\}
61 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 b2 00 04 00 00[ ]*vpmadd52huq 0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\}
62 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 72 80[ ]*vpmadd52huq -0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\}
63 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 b2 f8 fb ff ff[ ]*vpmadd52huq -0x408\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\
    [all...]
avx512cd_vl-intel.d 16 [ ]*[a-f0-9]+:[ ]*62 f2 7d 1f c4 30[ ]*vpconflictd xmm6\{k7\},DWORD PTR \[eax\]\{1to4\}
21 [ ]*[a-f0-9]+:[ ]*62 f2 7d 1f c4 72 7f[ ]*vpconflictd xmm6\{k7\},DWORD PTR \[edx\+0x1fc\]\{1to4\}
22 [ ]*[a-f0-9]+:[ ]*62 f2 7d 1f c4 b2 00 02 00 00[ ]*vpconflictd xmm6\{k7\},DWORD PTR \[edx\+0x200\]\{1to4\}
23 [ ]*[a-f0-9]+:[ ]*62 f2 7d 1f c4 72 80[ ]*vpconflictd xmm6\{k7\},DWORD PTR \[edx-0x200\]\{1to4\}
24 [ ]*[a-f0-9]+:[ ]*62 f2 7d 1f c4 b2 fc fd ff ff[ ]*vpconflictd xmm6\{k7\},DWORD PTR \[edx-0x204\]\{1to4\}
55 [ ]*[a-f0-9]+:[ ]*62 f2 fd 3f c4 30[ ]*vpconflictq ymm6\{k7\},QWORD PTR \[eax\]\{1to4\}
60 [ ]*[a-f0-9]+:[ ]*62 f2 fd 3f c4 72 7f[ ]*vpconflictq ymm6\{k7\},QWORD PTR \[edx\+0x3f8\]\{1to4\}
61 [ ]*[a-f0-9]+:[ ]*62 f2 fd 3f c4 b2 00 04 00 00[ ]*vpconflictq ymm6\{k7\},QWORD PTR \[edx\+0x400\]\{1to4\}
62 [ ]*[a-f0-9]+:[ ]*62 f2 fd 3f c4 72 80[ ]*vpconflictq ymm6\{k7\},QWORD PTR \[edx-0x400\]\{1to4\}
63 [ ]*[a-f0-9]+:[ ]*62 f2 fd 3f c4 b2 f8 fb ff ff[ ]*vpconflictq ymm6\{k7\},QWORD PTR \[edx-0x408\]\{1to4\}
    [all...]
avx512cd_vl.d 16 [ ]*[a-f0-9]+:[ ]*62 f2 7d 1f c4 30[ ]*vpconflictd \(%eax\)\{1to4\},%xmm6\{%k7\}
21 [ ]*[a-f0-9]+:[ ]*62 f2 7d 1f c4 72 7f[ ]*vpconflictd 0x1fc\(%edx\)\{1to4\},%xmm6\{%k7\}
22 [ ]*[a-f0-9]+:[ ]*62 f2 7d 1f c4 b2 00 02 00 00[ ]*vpconflictd 0x200\(%edx\)\{1to4\},%xmm6\{%k7\}
23 [ ]*[a-f0-9]+:[ ]*62 f2 7d 1f c4 72 80[ ]*vpconflictd -0x200\(%edx\)\{1to4\},%xmm6\{%k7\}
24 [ ]*[a-f0-9]+:[ ]*62 f2 7d 1f c4 b2 fc fd ff ff[ ]*vpconflictd -0x204\(%edx\)\{1to4\},%xmm6\{%k7\}
55 [ ]*[a-f0-9]+:[ ]*62 f2 fd 3f c4 30[ ]*vpconflictq \(%eax\)\{1to4\},%ymm6\{%k7\}
60 [ ]*[a-f0-9]+:[ ]*62 f2 fd 3f c4 72 7f[ ]*vpconflictq 0x3f8\(%edx\)\{1to4\},%ymm6\{%k7\}
61 [ ]*[a-f0-9]+:[ ]*62 f2 fd 3f c4 b2 00 04 00 00[ ]*vpconflictq 0x400\(%edx\)\{1to4\},%ymm6\{%k7\}
62 [ ]*[a-f0-9]+:[ ]*62 f2 fd 3f c4 72 80[ ]*vpconflictq -0x400\(%edx\)\{1to4\},%ymm6\{%k7\}
63 [ ]*[a-f0-9]+:[ ]*62 f2 fd 3f c4 b2 f8 fb ff ff[ ]*vpconflictq -0x408\(%edx\)\{1to4\},%ymm6\{%k7\
    [all...]
avx512f_vl-intel.d 29 [ ]*[a-f0-9]+:[ ]*62 f1 d5 3f 58 30[ ]*vaddpd ymm6\{k7\},ymm5,QWORD PTR \[eax\]\{1to4\}
34 [ ]*[a-f0-9]+:[ ]*62 f1 d5 3f 58 72 7f[ ]*vaddpd ymm6\{k7\},ymm5,QWORD PTR \[edx\+0x3f8\]\{1to4\}
35 [ ]*[a-f0-9]+:[ ]*62 f1 d5 3f 58 b2 00 04 00 00[ ]*vaddpd ymm6\{k7\},ymm5,QWORD PTR \[edx\+0x400\]\{1to4\}
36 [ ]*[a-f0-9]+:[ ]*62 f1 d5 3f 58 72 80[ ]*vaddpd ymm6\{k7\},ymm5,QWORD PTR \[edx-0x400\]\{1to4\}
37 [ ]*[a-f0-9]+:[ ]*62 f1 d5 3f 58 b2 f8 fb ff ff[ ]*vaddpd ymm6\{k7\},ymm5,QWORD PTR \[edx-0x408\]\{1to4\}
42 [ ]*[a-f0-9]+:[ ]*62 f1 54 1f 58 30[ ]*vaddps xmm6\{k7\},xmm5,DWORD PTR \[eax\]\{1to4\}
47 [ ]*[a-f0-9]+:[ ]*62 f1 54 1f 58 72 7f[ ]*vaddps xmm6\{k7\},xmm5,DWORD PTR \[edx\+0x1fc\]\{1to4\}
48 [ ]*[a-f0-9]+:[ ]*62 f1 54 1f 58 b2 00 02 00 00[ ]*vaddps xmm6\{k7\},xmm5,DWORD PTR \[edx\+0x200\]\{1to4\}
49 [ ]*[a-f0-9]+:[ ]*62 f1 54 1f 58 72 80[ ]*vaddps xmm6\{k7\},xmm5,DWORD PTR \[edx-0x200\]\{1to4\}
50 [ ]*[a-f0-9]+:[ ]*62 f1 54 1f 58 b2 fc fd ff ff[ ]*vaddps xmm6\{k7\},xmm5,DWORD PTR \[edx-0x204\]\{1to4\}
    [all...]
avx512dq_vl-intel.d 51 [ ]*[a-f0-9]+:[ ]*62 f1 fd 3f 7b 30[ ]*vcvtpd2qq ymm6\{k7\},QWORD PTR \[eax\]\{1to4\}
56 [ ]*[a-f0-9]+:[ ]*62 f1 fd 3f 7b 72 7f[ ]*vcvtpd2qq ymm6\{k7\},QWORD PTR \[edx\+0x3f8\]\{1to4\}
57 [ ]*[a-f0-9]+:[ ]*62 f1 fd 3f 7b b2 00 04 00 00[ ]*vcvtpd2qq ymm6\{k7\},QWORD PTR \[edx\+0x400\]\{1to4\}
58 [ ]*[a-f0-9]+:[ ]*62 f1 fd 3f 7b 72 80[ ]*vcvtpd2qq ymm6\{k7\},QWORD PTR \[edx-0x400\]\{1to4\}
59 [ ]*[a-f0-9]+:[ ]*62 f1 fd 3f 7b b2 f8 fb ff ff[ ]*vcvtpd2qq ymm6\{k7\},QWORD PTR \[edx-0x408\]\{1to4\}
77 [ ]*[a-f0-9]+:[ ]*62 f1 fd 3f 79 30[ ]*vcvtpd2uqq ymm6\{k7\},QWORD PTR \[eax\]\{1to4\}
82 [ ]*[a-f0-9]+:[ ]*62 f1 fd 3f 79 72 7f[ ]*vcvtpd2uqq ymm6\{k7\},QWORD PTR \[edx\+0x3f8\]\{1to4\}
83 [ ]*[a-f0-9]+:[ ]*62 f1 fd 3f 79 b2 00 04 00 00[ ]*vcvtpd2uqq ymm6\{k7\},QWORD PTR \[edx\+0x400\]\{1to4\}
84 [ ]*[a-f0-9]+:[ ]*62 f1 fd 3f 79 72 80[ ]*vcvtpd2uqq ymm6\{k7\},QWORD PTR \[edx-0x400\]\{1to4\}
85 [ ]*[a-f0-9]+:[ ]*62 f1 fd 3f 79 b2 f8 fb ff ff[ ]*vcvtpd2uqq ymm6\{k7\},QWORD PTR \[edx-0x408\]\{1to4\}
    [all...]
x86-64-avx512vbmi_vl-intel.d 85 [ ]*[a-f0-9]+:[ ]*62 62 95 30 83 31[ ]*vpmultishiftqb ymm30,ymm29,QWORD PTR \[rcx\]\{1to4\}
90 [ ]*[a-f0-9]+:[ ]*62 62 95 30 83 72 7f[ ]*vpmultishiftqb ymm30,ymm29,QWORD PTR \[rdx\+0x3f8\]\{1to4\}
91 [ ]*[a-f0-9]+:[ ]*62 62 95 30 83 b2 00 04 00 00[ ]*vpmultishiftqb ymm30,ymm29,QWORD PTR \[rdx\+0x400\]\{1to4\}
92 [ ]*[a-f0-9]+:[ ]*62 62 95 30 83 72 80[ ]*vpmultishiftqb ymm30,ymm29,QWORD PTR \[rdx-0x400\]\{1to4\}
93 [ ]*[a-f0-9]+:[ ]*62 62 95 30 83 b2 f8 fb ff ff[ ]*vpmultishiftqb ymm30,ymm29,QWORD PTR \[rdx-0x408\]\{1to4\}
167 [ ]*[a-f0-9]+:[ ]*62 62 95 30 83 31[ ]*vpmultishiftqb ymm30,ymm29,QWORD PTR \[rcx\]\{1to4\}
172 [ ]*[a-f0-9]+:[ ]*62 62 95 30 83 72 7f[ ]*vpmultishiftqb ymm30,ymm29,QWORD PTR \[rdx\+0x3f8\]\{1to4\}
173 [ ]*[a-f0-9]+:[ ]*62 62 95 30 83 b2 00 04 00 00[ ]*vpmultishiftqb ymm30,ymm29,QWORD PTR \[rdx\+0x400\]\{1to4\}
174 [ ]*[a-f0-9]+:[ ]*62 62 95 30 83 72 80[ ]*vpmultishiftqb ymm30,ymm29,QWORD PTR \[rdx-0x400\]\{1to4\}
175 [ ]*[a-f0-9]+:[ ]*62 62 95 30 83 b2 f8 fb ff ff[ ]*vpmultishiftqb ymm30,ymm29,QWORD PTR \[rdx-0x408\]\{1to4\}
    [all...]
x86-64-avx512vbmi_vl.d 85 [ ]*[a-f0-9]+:[ ]*62 62 95 30 83 31[ ]*vpmultishiftqb \(%rcx\)\{1to4\},%ymm29,%ymm30
90 [ ]*[a-f0-9]+:[ ]*62 62 95 30 83 72 7f[ ]*vpmultishiftqb 0x3f8\(%rdx\)\{1to4\},%ymm29,%ymm30
91 [ ]*[a-f0-9]+:[ ]*62 62 95 30 83 b2 00 04 00 00[ ]*vpmultishiftqb 0x400\(%rdx\)\{1to4\},%ymm29,%ymm30
92 [ ]*[a-f0-9]+:[ ]*62 62 95 30 83 72 80[ ]*vpmultishiftqb -0x400\(%rdx\)\{1to4\},%ymm29,%ymm30
93 [ ]*[a-f0-9]+:[ ]*62 62 95 30 83 b2 f8 fb ff ff[ ]*vpmultishiftqb -0x408\(%rdx\)\{1to4\},%ymm29,%ymm30
167 [ ]*[a-f0-9]+:[ ]*62 62 95 30 83 31[ ]*vpmultishiftqb \(%rcx\)\{1to4\},%ymm29,%ymm30
172 [ ]*[a-f0-9]+:[ ]*62 62 95 30 83 72 7f[ ]*vpmultishiftqb 0x3f8\(%rdx\)\{1to4\},%ymm29,%ymm30
173 [ ]*[a-f0-9]+:[ ]*62 62 95 30 83 b2 00 04 00 00[ ]*vpmultishiftqb 0x400\(%rdx\)\{1to4\},%ymm29,%ymm30
174 [ ]*[a-f0-9]+:[ ]*62 62 95 30 83 72 80[ ]*vpmultishiftqb -0x400\(%rdx\)\{1to4\},%ymm29,%ymm30
175 [ ]*[a-f0-9]+:[ ]*62 62 95 30 83 b2 f8 fb ff ff[ ]*vpmultishiftqb -0x408\(%rdx\)\{1to4\},%ymm29,%ymm3
    [all...]
avx512vbmi_vl.s 71 vpmultishiftqb (%eax){1to4}, %ymm5, %ymm6{%k7} # AVX512{VBMI,VL}
76 vpmultishiftqb 1016(%edx){1to4}, %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} Disp8
77 vpmultishiftqb 1024(%edx){1to4}, %ymm5, %ymm6{%k7} # AVX512{VBMI,VL}
78 vpmultishiftqb -1024(%edx){1to4}, %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} Disp8
79 vpmultishiftqb -1032(%edx){1to4}, %ymm5, %ymm6{%k7} # AVX512{VBMI,VL}
147 vpmultishiftqb ymm6{k7}, ymm5, [eax]{1to4} # AVX512{VBMI,VL}
152 vpmultishiftqb ymm6{k7}, ymm5, [edx+1016]{1to4} # AVX512{VBMI,VL} Disp8
153 vpmultishiftqb ymm6{k7}, ymm5, [edx+1024]{1to4} # AVX512{VBMI,VL}
154 vpmultishiftqb ymm6{k7}, ymm5, [edx-1024]{1to4} # AVX512{VBMI,VL} Disp8
155 vpmultishiftqb ymm6{k7}, ymm5, [edx-1032]{1to4} # AVX512{VBMI,VL
    [all...]
x86-64-avx512vbmi_vl.s 79 vpmultishiftqb (%rcx){1to4}, %ymm29, %ymm30 # AVX512{VBMI,VL}
84 vpmultishiftqb 1016(%rdx){1to4}, %ymm29, %ymm30 # AVX512{VBMI,VL} Disp8
85 vpmultishiftqb 1024(%rdx){1to4}, %ymm29, %ymm30 # AVX512{VBMI,VL}
86 vpmultishiftqb -1024(%rdx){1to4}, %ymm29, %ymm30 # AVX512{VBMI,VL} Disp8
87 vpmultishiftqb -1032(%rdx){1to4}, %ymm29, %ymm30 # AVX512{VBMI,VL}
163 vpmultishiftqb ymm30, ymm29, [rcx]{1to4} # AVX512{VBMI,VL}
168 vpmultishiftqb ymm30, ymm29, [rdx+1016]{1to4} # AVX512{VBMI,VL} Disp8
169 vpmultishiftqb ymm30, ymm29, [rdx+1024]{1to4} # AVX512{VBMI,VL}
170 vpmultishiftqb ymm30, ymm29, [rdx-1024]{1to4} # AVX512{VBMI,VL} Disp8
171 vpmultishiftqb ymm30, ymm29, [rdx-1032]{1to4} # AVX512{VBMI,VL
    [all...]
avx512vbmi_vl-intel.d 77 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 30[ ]*vpmultishiftqb ymm6\{k7\},ymm5,QWORD PTR \[eax\]\{1to4\}
82 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 72 7f[ ]*vpmultishiftqb ymm6\{k7\},ymm5,QWORD PTR \[edx\+0x3f8\]\{1to4\}
83 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 b2 00 04 00 00[ ]*vpmultishiftqb ymm6\{k7\},ymm5,QWORD PTR \[edx\+0x400\]\{1to4\}
84 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 72 80[ ]*vpmultishiftqb ymm6\{k7\},ymm5,QWORD PTR \[edx-0x400\]\{1to4\}
85 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 b2 f8 fb ff ff[ ]*vpmultishiftqb ymm6\{k7\},ymm5,QWORD PTR \[edx-0x408\]\{1to4\}
151 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 30[ ]*vpmultishiftqb ymm6\{k7\},ymm5,QWORD PTR \[eax\]\{1to4\}
156 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 72 7f[ ]*vpmultishiftqb ymm6\{k7\},ymm5,QWORD PTR \[edx\+0x3f8\]\{1to4\}
157 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 b2 00 04 00 00[ ]*vpmultishiftqb ymm6\{k7\},ymm5,QWORD PTR \[edx\+0x400\]\{1to4\}
158 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 72 80[ ]*vpmultishiftqb ymm6\{k7\},ymm5,QWORD PTR \[edx-0x400\]\{1to4\}
159 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 b2 f8 fb ff ff[ ]*vpmultishiftqb ymm6\{k7\},ymm5,QWORD PTR \[edx-0x408\]\{1to4\}
    [all...]
avx512vbmi_vl.d 77 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 30[ ]*vpmultishiftqb \(%eax\)\{1to4\},%ymm5,%ymm6\{%k7\}
82 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 72 7f[ ]*vpmultishiftqb 0x3f8\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\}
83 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 b2 00 04 00 00[ ]*vpmultishiftqb 0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\}
84 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 72 80[ ]*vpmultishiftqb -0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\}
85 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 b2 f8 fb ff ff[ ]*vpmultishiftqb -0x408\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\}
151 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 30[ ]*vpmultishiftqb \(%eax\)\{1to4\},%ymm5,%ymm6\{%k7\}
156 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 72 7f[ ]*vpmultishiftqb 0x3f8\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\}
157 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 b2 00 04 00 00[ ]*vpmultishiftqb 0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\}
158 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 72 80[ ]*vpmultishiftqb -0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\}
159 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 b2 f8 fb ff ff[ ]*vpmultishiftqb -0x408\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\
    [all...]
x86-64-avx512bw_vl.d 53 [ ]*[a-f0-9]+:[ ]*62 61 15 10 6b 31[ ]*vpackssdw \(%rcx\)\{1to4\},%xmm29,%xmm30
58 [ ]*[a-f0-9]+:[ ]*62 61 15 10 6b 72 7f[ ]*vpackssdw 0x1fc\(%rdx\)\{1to4\},%xmm29,%xmm30
59 [ ]*[a-f0-9]+:[ ]*62 61 15 10 6b b2 00 02 00 00[ ]*vpackssdw 0x200\(%rdx\)\{1to4\},%xmm29,%xmm30
60 [ ]*[a-f0-9]+:[ ]*62 61 15 10 6b 72 80[ ]*vpackssdw -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30
61 [ ]*[a-f0-9]+:[ ]*62 61 15 10 6b b2 fc fd ff ff[ ]*vpackssdw -0x204\(%rdx\)\{1to4\},%xmm29,%xmm30
99 [ ]*[a-f0-9]+:[ ]*62 62 15 10 2b 31[ ]*vpackusdw \(%rcx\)\{1to4\},%xmm29,%xmm30
104 [ ]*[a-f0-9]+:[ ]*62 62 15 10 2b 72 7f[ ]*vpackusdw 0x1fc\(%rdx\)\{1to4\},%xmm29,%xmm30
105 [ ]*[a-f0-9]+:[ ]*62 62 15 10 2b b2 00 02 00 00[ ]*vpackusdw 0x200\(%rdx\)\{1to4\},%xmm29,%xmm30
106 [ ]*[a-f0-9]+:[ ]*62 62 15 10 2b 72 80[ ]*vpackusdw -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30
107 [ ]*[a-f0-9]+:[ ]*62 62 15 10 2b b2 fc fd ff ff[ ]*vpackusdw -0x204\(%rdx\)\{1to4\},%xmm29,%xmm3
    [all...]
avx512bw_vl.s 42 vpackssdw (%eax){1to4}, %xmm5, %xmm6{%k7} # AVX512{BW,VL}
47 vpackssdw 508(%edx){1to4}, %xmm5, %xmm6{%k7} # AVX512{BW,VL} Disp8
48 vpackssdw 512(%edx){1to4}, %xmm5, %xmm6{%k7} # AVX512{BW,VL}
49 vpackssdw -512(%edx){1to4}, %xmm5, %xmm6{%k7} # AVX512{BW,VL} Disp8
50 vpackssdw -516(%edx){1to4}, %xmm5, %xmm6{%k7} # AVX512{BW,VL}
84 vpackusdw (%eax){1to4}, %xmm5, %xmm6{%k7} # AVX512{BW,VL}
89 vpackusdw 508(%edx){1to4}, %xmm5, %xmm6{%k7} # AVX512{BW,VL} Disp8
90 vpackusdw 512(%edx){1to4}, %xmm5, %xmm6{%k7} # AVX512{BW,VL}
91 vpackusdw -512(%edx){1to4}, %xmm5, %xmm6{%k7} # AVX512{BW,VL} Disp8
92 vpackusdw -516(%edx){1to4}, %xmm5, %xmm6{%k7} # AVX512{BW,VL
    [all...]
x86-64-avx512bw_vl.s 47 vpackssdw (%rcx){1to4}, %xmm29, %xmm30 # AVX512{BW,VL}
52 vpackssdw 508(%rdx){1to4}, %xmm29, %xmm30 # AVX512{BW,VL} Disp8
53 vpackssdw 512(%rdx){1to4}, %xmm29, %xmm30 # AVX512{BW,VL}
54 vpackssdw -512(%rdx){1to4}, %xmm29, %xmm30 # AVX512{BW,VL} Disp8
55 vpackssdw -516(%rdx){1to4}, %xmm29, %xmm30 # AVX512{BW,VL}
93 vpackusdw (%rcx){1to4}, %xmm29, %xmm30 # AVX512{BW,VL}
98 vpackusdw 508(%rdx){1to4}, %xmm29, %xmm30 # AVX512{BW,VL} Disp8
99 vpackusdw 512(%rdx){1to4}, %xmm29, %xmm30 # AVX512{BW,VL}
100 vpackusdw -512(%rdx){1to4}, %xmm29, %xmm30 # AVX512{BW,VL} Disp8
101 vpackusdw -516(%rdx){1to4}, %xmm29, %xmm30 # AVX512{BW,VL
    [all...]
avx512bw_vl-intel.d 48 [ ]*[a-f0-9]+:[ ]*62 f1 55 1f 6b 30[ ]*vpackssdw xmm6\{k7\},xmm5,DWORD PTR \[eax\]\{1to4\}
53 [ ]*[a-f0-9]+:[ ]*62 f1 55 1f 6b 72 7f[ ]*vpackssdw xmm6\{k7\},xmm5,DWORD PTR \[edx\+0x1fc\]\{1to4\}
54 [ ]*[a-f0-9]+:[ ]*62 f1 55 1f 6b b2 00 02 00 00[ ]*vpackssdw xmm6\{k7\},xmm5,DWORD PTR \[edx\+0x200\]\{1to4\}
55 [ ]*[a-f0-9]+:[ ]*62 f1 55 1f 6b 72 80[ ]*vpackssdw xmm6\{k7\},xmm5,DWORD PTR \[edx-0x200\]\{1to4\}
56 [ ]*[a-f0-9]+:[ ]*62 f1 55 1f 6b b2 fc fd ff ff[ ]*vpackssdw xmm6\{k7\},xmm5,DWORD PTR \[edx-0x204\]\{1to4\}
90 [ ]*[a-f0-9]+:[ ]*62 f2 55 1f 2b 30[ ]*vpackusdw xmm6\{k7\},xmm5,DWORD PTR \[eax\]\{1to4\}
95 [ ]*[a-f0-9]+:[ ]*62 f2 55 1f 2b 72 7f[ ]*vpackusdw xmm6\{k7\},xmm5,DWORD PTR \[edx\+0x1fc\]\{1to4\}
96 [ ]*[a-f0-9]+:[ ]*62 f2 55 1f 2b b2 00 02 00 00[ ]*vpackusdw xmm6\{k7\},xmm5,DWORD PTR \[edx\+0x200\]\{1to4\}
97 [ ]*[a-f0-9]+:[ ]*62 f2 55 1f 2b 72 80[ ]*vpackusdw xmm6\{k7\},xmm5,DWORD PTR \[edx-0x200\]\{1to4\}
98 [ ]*[a-f0-9]+:[ ]*62 f2 55 1f 2b b2 fc fd ff ff[ ]*vpackusdw xmm6\{k7\},xmm5,DWORD PTR \[edx-0x204\]\{1to4\}
    [all...]
avx512bw_vl.d 48 [ ]*[a-f0-9]+:[ ]*62 f1 55 1f 6b 30[ ]*vpackssdw \(%eax\)\{1to4\},%xmm5,%xmm6\{%k7\}
53 [ ]*[a-f0-9]+:[ ]*62 f1 55 1f 6b 72 7f[ ]*vpackssdw 0x1fc\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}
54 [ ]*[a-f0-9]+:[ ]*62 f1 55 1f 6b b2 00 02 00 00[ ]*vpackssdw 0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}
55 [ ]*[a-f0-9]+:[ ]*62 f1 55 1f 6b 72 80[ ]*vpackssdw -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}
56 [ ]*[a-f0-9]+:[ ]*62 f1 55 1f 6b b2 fc fd ff ff[ ]*vpackssdw -0x204\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}
90 [ ]*[a-f0-9]+:[ ]*62 f2 55 1f 2b 30[ ]*vpackusdw \(%eax\)\{1to4\},%xmm5,%xmm6\{%k7\}
95 [ ]*[a-f0-9]+:[ ]*62 f2 55 1f 2b 72 7f[ ]*vpackusdw 0x1fc\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}
96 [ ]*[a-f0-9]+:[ ]*62 f2 55 1f 2b b2 00 02 00 00[ ]*vpackusdw 0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}
97 [ ]*[a-f0-9]+:[ ]*62 f2 55 1f 2b 72 80[ ]*vpackusdw -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}
98 [ ]*[a-f0-9]+:[ ]*62 f2 55 1f 2b b2 fc fd ff ff[ ]*vpackusdw -0x204\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\
    [all...]
x86-64-avx512bw_vl-intel.d 53 [ ]*[a-f0-9]+:[ ]*62 61 15 10 6b 31[ ]*vpackssdw xmm30,xmm29,DWORD PTR \[rcx\]\{1to4\}
58 [ ]*[a-f0-9]+:[ ]*62 61 15 10 6b 72 7f[ ]*vpackssdw xmm30,xmm29,DWORD PTR \[rdx\+0x1fc\]\{1to4\}
59 [ ]*[a-f0-9]+:[ ]*62 61 15 10 6b b2 00 02 00 00[ ]*vpackssdw xmm30,xmm29,DWORD PTR \[rdx\+0x200\]\{1to4\}
60 [ ]*[a-f0-9]+:[ ]*62 61 15 10 6b 72 80[ ]*vpackssdw xmm30,xmm29,DWORD PTR \[rdx-0x200\]\{1to4\}
61 [ ]*[a-f0-9]+:[ ]*62 61 15 10 6b b2 fc fd ff ff[ ]*vpackssdw xmm30,xmm29,DWORD PTR \[rdx-0x204\]\{1to4\}
99 [ ]*[a-f0-9]+:[ ]*62 62 15 10 2b 31[ ]*vpackusdw xmm30,xmm29,DWORD PTR \[rcx\]\{1to4\}
104 [ ]*[a-f0-9]+:[ ]*62 62 15 10 2b 72 7f[ ]*vpackusdw xmm30,xmm29,DWORD PTR \[rdx\+0x1fc\]\{1to4\}
105 [ ]*[a-f0-9]+:[ ]*62 62 15 10 2b b2 00 02 00 00[ ]*vpackusdw xmm30,xmm29,DWORD PTR \[rdx\+0x200\]\{1to4\}
106 [ ]*[a-f0-9]+:[ ]*62 62 15 10 2b 72 80[ ]*vpackusdw xmm30,xmm29,DWORD PTR \[rdx-0x200\]\{1to4\}
107 [ ]*[a-f0-9]+:[ ]*62 62 15 10 2b b2 fc fd ff ff[ ]*vpackusdw xmm30,xmm29,DWORD PTR \[rdx-0x204\]\{1to4\}
    [all...]
  /external/llvm/test/MC/X86/
x86-64-avx512bw_vl.s     [all...]

Completed in 195 milliseconds

12