| /external/llvm/test/MC/AMDGPU/ |
| mubuf.s | 72 buffer_load_dword v1, v2, s[4:7], s1 idxen
73 // SICI: buffer_load_dword v1, v2, s[4:7], s1 idxen ; encoding: [0x00,0x20,0x30,0xe0,0x02,0x01,0x01,0x01]
75 buffer_load_dword v1, v2, s[4:7], s1 idxen offset:4
76 // SICI: buffer_load_dword v1, v2, s[4:7], s1 idxen offset:4 ; encoding: [0x04,0x20,0x30,0xe0,0x02,0x01,0x01,0x01]
78 buffer_load_dword v1, v2, s[4:7], s1 idxen offset:4 glc
79 // SICI: buffer_load_dword v1, v2, s[4:7], s1 idxen offset:4 glc ; encoding: [0x04,0x60,0x30,0xe0,0x02,0x01,0x01,0x01]
81 buffer_load_dword v1, v2, s[4:7], s1 idxen offset:4 slc
82 // SICI: buffer_load_dword v1, v2, s[4:7], s1 idxen offset:4 slc ; encoding: [0x04,0x20,0x30,0xe0,0x02,0x01,0x41,0x01]
84 buffer_load_dword v1, v2, s[4:7], s1 idxen offset:4 tfe
85 // SICI: buffer_load_dword v1, v2, s[4:7], s1 idxen offset:4 tfe ; encoding: [0x04,0x20,0x30,0xe0,0x02,0x01,0x81,0x01
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| VIInstrFormats.td | 37 bits<1> idxen;
49 let Inst{13} = idxen;
65 bits<1> idxen;
78 let Inst{13} = idxen;
|
| SIIntrinsics.td | 35 llvm_i32_ty, // idxen(imm)
49 llvm_i32_ty, // idxen(imm)
|
| SIInstrInfo.td | 112 SDTCisVT<9, i32>, // idxen(imm)
480 def idxen : Operand<i1> {
[all...] |
| SIInstrFormats.td | 460 bits<1> idxen;
473 let Inst{13} = idxen;
491 bits<1> idxen;
504 let Inst{13} = idxen;
|
| AMDGPUISelDAGToDAG.cpp | 100 SDValue &Idxen, SDValue &Addr64, SDValue &GLC, SDValue &SLC,
[all...] |
| SIInstructions.td | [all...] |
| /external/llvm/test/CodeGen/AMDGPU/ |
| llvm.SI.load.dword.ll | 12 ; CHECK: buffer_load_dword {{v[0-9]+}}, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, 0 idxen glc slc
13 ; CHECK: buffer_load_dword {{v[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 idxen offen glc slc
15 ; CHECK: buffer_load_dword {{v[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, [[K]] idxen offen offset:65535 glc slc
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| SIInstrInfo.td | 188 bits<1> IDXEN;
201 let Inst{13} = IDXEN;
227 bits<1> IDXEN;
239 let Inst{13} = IDXEN;
457 (ins i16imm:$offset, i1imm:$offen, i1imm:$idxen, i1imm:$glc, i1imm:$addr64,
468 (ins i16imm:$offset, i1imm:$offen, i1imm:$idxen, i1imm:$glc, i1imm:$addr64,
479 (ins regClass:$vdata, i16imm:$offset, i1imm:$offen, i1imm:$idxen, i1imm:$glc,
|
| /external/llvm/lib/Target/AMDGPU/InstPrinter/ |
| AMDGPUInstPrinter.cpp | 64 O << " idxen";
|
