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  /external/llvm/test/CodeGen/AMDGPU/
llvm.AMDGPU.bfe.u32.ll 5 declare i32 @llvm.AMDGPU.bfe.u32(i32, i32, i32) nounwind readnone
11 %bfe_u32 = call i32 @llvm.AMDGPU.bfe.u32(i32 %src0, i32 %src1, i32 %src1) nounwind readnone
20 %bfe_u32 = call i32 @llvm.AMDGPU.bfe.u32(i32 %src0, i32 %src1, i32 123) nounwind readnone
29 %bfe_u32 = call i32 @llvm.AMDGPU.bfe.u32(i32 %src0, i32 123, i32 %src2) nounwind readnone
38 %bfe_u32 = call i32 @llvm.AMDGPU.bfe.u32(i32 123, i32 %src1, i32 %src2) nounwind readnone
44 ; SI-NOT: {{[^@]}}bfe
46 ; EG-NOT: BFE
48 %bfe_u32 = call i32 @llvm.AMDGPU.bfe.u32(i32 %src0, i32 %src1, i32 0) nounwind readnone
54 ; SI-NOT: {{[^@]}}bfe
56 ; EG-NOT: BFE
    [all...]
llvm.AMDGPU.bfe.i32.ll 5 declare i32 @llvm.AMDGPU.bfe.i32(i32, i32, i32) nounwind readnone
12 %bfe_i32 = call i32 @llvm.AMDGPU.bfe.i32(i32 %src0, i32 %src1, i32 %src1) nounwind readnone
21 %bfe_i32 = call i32 @llvm.AMDGPU.bfe.i32(i32 %src0, i32 %src1, i32 123) nounwind readnone
30 %bfe_i32 = call i32 @llvm.AMDGPU.bfe.i32(i32 %src0, i32 123, i32 %src2) nounwind readnone
39 %bfe_i32 = call i32 @llvm.AMDGPU.bfe.i32(i32 123, i32 %src1, i32 %src2) nounwind readnone
48 %bfe_i32 = call i32 @llvm.AMDGPU.bfe.i32(i32 %load, i32 2, i32 8) nounwind readnone
54 ; SI-NOT: {{[^@]}}bfe
56 ; EG-NOT: BFE
58 %bfe_u32 = call i32 @llvm.AMDGPU.bfe.i32(i32 %src0, i32 %src1, i32 0) nounwind readnone
64 ; SI-NOT: {{[^@]}}bfe
    [all...]
sext-eliminate.ll 8 ; EG-NOT: BFE
20 ; EG-NOT: BFE
sext-in-reg.ll 271 ; EG-NOT: BFE
292 ; EG-NOT: BFE
456 ; SI-NOT: bfe
468 declare i32 @llvm.AMDGPU.bfe.i32(i32, i32, i32) nounwind readnone
471 ; SI-NOT: {{[^@]}}bfe
475 %bfe = call i32 @llvm.AMDGPU.bfe.i32(i32 %load, i32 8, i32 0) nounwind readnone
476 store i32 %bfe, i32 addrspace(1)* %out, align 4
482 ; SI-NOT: {{[^@]}}bfe
486 %bfe0 = call i32 @llvm.AMDGPU.bfe.i32(i32 %load, i32 0, i32 8) nounwind readnon
    [all...]
cvt_f32_ubyte.ll 6 ; SI-NOT: bfe
19 ; SI-NOT: bfe
33 ; SI-NOT: bfe
48 ; SI-NOT: bfe
128 ; SI-NOT: bfe
138 ; SI-NOT: bfe
copy-illegal-type.ll 115 ; XSI: BFE
132 ; SI-NOT: bfe
global-extload-i1.ll 168 ; SI: v_bfe_i32 [[BFE:v[0-9]+]], {{v[0-9]+}}, 0, 1{{$}}
169 ; SI: v_ashrrev_i32_e32 v{{[0-9]+}}, 31, [[BFE]]
  /external/llvm/test/CodeGen/NVPTX/
bfe.ll 6 ; CHECK: bfe.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, 4, 4
16 ; CHECK: bfe.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, 3, 3
26 ; CHECK: bfe.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, 5, 3