| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| r6.s | 170 bgec $2, $3, ext
171 bgec $2, $3, . + 4 + (-32768 << 2)
172 bgec $2, $3, . + 4 + (32767 << 2)
173 bgec $2, $3, 1f
174 bgec $3, $2, 1f
|
| r6-n32.d | 295 0+0378 <[^>]*> 58430000 bgec v0,v1,0000037c <[^>]*>
298 0+0380 <[^>]*> 58430000 bgec v0,v1,00000384 <[^>]*>
301 0+0388 <[^>]*> 58430000 bgec v0,v1,0000038c <[^>]*>
304 0+0390 <[^>]*> 58430000 bgec v0,v1,00000394 <[^>]*>
307 0+0398 <[^>]*> 58620000 bgec v1,v0,0000039c <[^>]*>
|
| r6.d | 294 0+0378 <[^>]*> 5843ffff bgec v0,v1,00000378 <[^>]*>
297 0+0380 <[^>]*> 58438000 bgec v0,v1,fffe0384 <[^>]*>
300 0+0388 <[^>]*> 58437fff bgec v0,v1,00020388 <[^>]*>
303 0+0390 <[^>]*> 5843ffff bgec v0,v1,00000390 <[^>]*>
306 0+0398 <[^>]*> 5862ffff bgec v1,v0,00000398 <[^>]*>
|
| r6-n64.d | 419 0+0378 <[^>]*> 58430000 bgec v0,v1,0+037c <[^>]*>
424 0+0380 <[^>]*> 58430000 bgec v0,v1,0+0384 <[^>]*>
429 0+0388 <[^>]*> 58430000 bgec v0,v1,0+038c <[^>]*>
434 0+0390 <[^>]*> 58430000 bgec v0,v1,0+0394 <[^>]*>
439 0+0398 <[^>]*> 58620000 bgec v1,v0,0+039c <[^>]*>
|
| /art/runtime/interpreter/mterp/mips64/ |
| header.S | 31 * idioms, which should translate into bgec and bltc respectively with swapped
36 bgec \rreg, \lreg, \target
|
| /external/v8/test/cctest/ |
| test-disasm-mips.cc | 367 COMPARE_PC_REL_COMPACT(bgec(a0, a1, -32768),
368 "58858000 bgec a0, a1, -32768", -32768);
369 COMPARE_PC_REL_COMPACT(bgec(a0, a1, -1),
370 "5885ffff bgec a0, a1, -1", -1);
371 COMPARE_PC_REL_COMPACT(bgec(a0, a1, 1), "58850001 bgec a0, a1, 1",
373 COMPARE_PC_REL_COMPACT(bgec(a0, a1, 32767),
374 "58857fff bgec a0, a1, 32767", 32767);
[all...] |
| test-disasm-mips64.cc | [all...] |
| /external/v8/src/mips/ |
| constants-mips.cc | 140 case BLEZL: // POP26 bgezc, blezc, bgec/blec
|
| assembler-mips.h | 611 void bgec(Register rs, Register rt, int16_t offset);
612 inline void bgec(Register rs, Register rt, Label* L) {
613 bgec(rs, rt, shifted_branch_offset(L));
[all...] |
| /external/v8/src/mips64/ |
| constants-mips64.cc | 140 case BLEZL: // POP26 bgezc, blezc, bgec/blec
|
| assembler-mips64.h | 615 void bgec(Register rs, Register rt, int16_t offset);
616 inline void bgec(Register rs, Register rt, Label* L) {
617 bgec(rs, rt, shifted_branch_offset(L));
[all...] |
| /art/compiler/utils/mips64/ |
| assembler_mips64.h | 224 void Bgec(GpuRegister rs, GpuRegister rt, uint16_t imm16);
342 void Bgec(GpuRegister rs, GpuRegister rt, Mips64Label* label);
|
| assembler_mips64.cc | 571 void Mips64Assembler::Bgec(GpuRegister rs, GpuRegister rt, uint16_t imm16) {
643 Bgec(rs, rt, imm16_21);
646 Bgec(rt, rs, imm16_21);
[all...] |
| assembler_mips64_test.cc | 722 TEST_F(AssemblerMIPS64Test, Bgec) {
723 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bgec, "Bgec");
[all...] |
| /external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
| valid-mips32r6-el.txt | 25 0x40 0x00 0x43 0x58 # CHECK: bgec $2, $3, 256
|
| valid-mips32r6.txt | 147 0x58 0x43 0x00 0x40 # CHECK: bgec $2, $3, 256
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| valid.s | 45 bgec $2, $3, 256 # CHECK: bgec $2, $3, 256 # encoding: [0x58,0x43,0x00,0x40]
|