| /external/llvm/test/Instrumentation/MemorySanitizer/ |
| vector_cvt.ll | 7 declare <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double>, i32) nounwind readnone
32 %0 = tail call <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double> %vec, i32 %a)
45 ; CHECK: call <2 x double> @llvm.x86.sse2.cvtsi2sd
|
| /external/compiler-rt/lib/builtins/i386/ |
| floatdidf.S | 25 cvtsi2sd 8(%esp), %xmm1
|
| /external/llvm/test/CodeGen/X86/ |
| negative-stride-fptosi-user.ll | 1 ; RUN: llc < %s -march=x86-64 | grep cvtsi2sd
|
| vec_ss_load_fold.ll | 77 %0 = tail call <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double> <double
83 ; CHECK: cvtsi2sd
86 declare <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double>, i32) nounwind readnone
|
| break-false-dep.ll | 140 ; This loop contains a cvtsi2sd instruction that has a loop-carried
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| x86-64-simd.s | 11 cvtsi2sd %eax, %xmm1
15 cvtsi2sd %rax, %xmm1
19 cvtsi2sd (%rax), %xmm1
138 cvtsi2sd xmm1,eax label
142 cvtsi2sd xmm1,rax label
146 cvtsi2sd xmm1,DWORD PTR [rax] label
150 cvtsi2sd xmm1,QWORD PTR [rax] label
|
| simd.s | 94 cvtsi2sd %eax, %xmm1
98 cvtsi2sd (%eax), %xmm1
190 cvtsi2sd xmm1,eax label
195 cvtsi2sd xmm1,DWORD PTR [eax] label
196 cvtsi2sd xmm1,[eax] label
|
| inval.s | 69 cvtsi2sd xmm1,QWORD PTR [eax]
|
| x86-64-simd-intel.d | 19 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd xmm1,eax
21 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd xmm1,eax
23 [ ]*[a-f0-9]+: f2 48 0f 2a c8 cvtsi2sd xmm1,rax
25 [ ]*[a-f0-9]+: f2 48 0f 2a c8 cvtsi2sd xmm1,rax
27 [ ]*[a-f0-9]+: f2 0f 2a 08 cvtsi2sd xmm1,DWORD PTR \[rax\]
29 [ ]*[a-f0-9]+: f2 0f 2a 08 cvtsi2sd xmm1,DWORD PTR \[rax\]
31 [ ]*[a-f0-9]+: f2 48 0f 2a 08 cvtsi2sd xmm1,QWORD PTR \[rax\]
136 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd xmm1,eax
138 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd xmm1,eax
140 [ ]*[a-f0-9]+: f2 48 0f 2a c8 cvtsi2sd xmm1,ra
[all...] |
| simd-intel.d | 97 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd xmm1,eax
99 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd xmm1,eax
101 [ ]*[a-f0-9]+: f2 0f 2a 08 cvtsi2sd xmm1,DWORD PTR \[eax\]
103 [ ]*[a-f0-9]+: f2 0f 2a 08 cvtsi2sd xmm1,DWORD PTR \[eax\]
190 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd xmm1,eax
192 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd xmm1,eax
195 [ ]*[a-f0-9]+: f2 0f 2a 08 cvtsi2sd xmm1,DWORD PTR \[eax\]
196 [ ]*[a-f0-9]+: f2 0f 2a 08 cvtsi2sd xmm1,DWORD PTR \[eax\]
198 [ ]*[a-f0-9]+: f2 0f 2a 08 cvtsi2sd xmm1,DWORD PTR \[eax\]
|
| x86-64-opcode.s | 199 # CVTSI2SD
200 CVTSI2SD (%r8),%xmm0 # -- -- F2 41 0F 2A 00 ; REX to access upper reg. OVR 128bit MMinstr.
201 CVTSI2SD (%rax),%xmm0 # -- -- F2 -- 0F 2A 00 ; OVR 128bit MMinstr.
202 CVTSI2SD (%r8),%xmm15 # -- -- F2 45 0F 2A 38 ; REX to access upper XMM reg. REX to access upper reg. OVR 128bit MMinstr.
203 CVTSI2SD (%rax),%xmm15 # -- -- F2 44 0F 2A 38 ; REX to access upper XMM reg. OVR 128bit MMinstr.
204 CVTSI2SD (%r8),%xmm8 # -- -- F2 45 0F 2A 00 ; REX to access upper XMM reg. REX to access upper reg. OVR 128bit MMinstr.
205 CVTSI2SD (%rax),%xmm8 # -- -- F2 44 0F 2A 00 ; REX to access upper XMM reg. OVR 128bit MMinstr.
206 CVTSI2SD (%r8),%xmm7 # -- -- F2 41 0F 2A 38 ; REX to access upper reg. OVR 128bit MMinstr.
207 CVTSI2SD (%rax),%xmm7 # -- -- F2 -- 0F 2A 38 ; OVR 128bit MMinstr.
208 CVTSI2SD %eax,%xmm0 # -- -- F2 -- 0F 2A C0 ; OVR 128bit MMinstr
[all...] |
| sse2.s | 58 cvtsi2sd %ebp,%xmm4
59 cvtsi2sd (%esi),%xmm5
|
| x86-64-simd.d | 18 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd %eax,%xmm1
20 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd %eax,%xmm1
22 [ ]*[a-f0-9]+: f2 48 0f 2a c8 cvtsi2sd %rax,%xmm1
24 [ ]*[a-f0-9]+: f2 48 0f 2a c8 cvtsi2sd %rax,%xmm1
135 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd %eax,%xmm1
137 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd %eax,%xmm1
139 [ ]*[a-f0-9]+: f2 48 0f 2a c8 cvtsi2sd %rax,%xmm1
141 [ ]*[a-f0-9]+: f2 48 0f 2a c8 cvtsi2sd %rax,%xmm1
|
| simd.d | 96 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd %eax,%xmm1
98 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd %eax,%xmm1
189 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd %eax,%xmm1
191 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd %eax,%xmm1
|
| inval.l | 158 [ ]*69[ ]+cvtsi2sd xmm1,QWORD PTR \[eax\]
|
| x86-64-opcode.d | 162 [ ]*[a-f0-9]+: f2 0f 2a c0 cvtsi2sd %eax,%xmm0
163 [ ]*[a-f0-9]+: f2 44 0f 2a f8 cvtsi2sd %eax,%xmm15
164 [ ]*[a-f0-9]+: f2 44 0f 2a c0 cvtsi2sd %eax,%xmm8
165 [ ]*[a-f0-9]+: f2 0f 2a f8 cvtsi2sd %eax,%xmm7
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/ |
| x86-64-simd-intel.d | 19 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd xmm1,eax
21 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd xmm1,eax
23 [ ]*[a-f0-9]+: f2 48 0f 2a c8 cvtsi2sd xmm1,rax
25 [ ]*[a-f0-9]+: f2 48 0f 2a c8 cvtsi2sd xmm1,rax
27 [ ]*[a-f0-9]+: f2 0f 2a 08 cvtsi2sd xmm1,DWORD PTR \[rax\]
29 [ ]*[a-f0-9]+: f2 0f 2a 08 cvtsi2sd xmm1,DWORD PTR \[rax\]
31 [ ]*[a-f0-9]+: f2 48 0f 2a 08 cvtsi2sd xmm1,QWORD PTR \[rax\]
136 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd xmm1,eax
138 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd xmm1,eax
140 [ ]*[a-f0-9]+: f2 48 0f 2a c8 cvtsi2sd xmm1,ra
[all...] |
| x86-64-simd.d | 19 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd %eax,%xmm1
21 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd %eax,%xmm1
23 [ ]*[a-f0-9]+: f2 48 0f 2a c8 cvtsi2sd %rax,%xmm1
25 [ ]*[a-f0-9]+: f2 48 0f 2a c8 cvtsi2sd %rax,%xmm1
136 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd %eax,%xmm1
138 [ ]*[a-f0-9]+: f2 0f 2a c8 cvtsi2sd %eax,%xmm1
140 [ ]*[a-f0-9]+: f2 48 0f 2a c8 cvtsi2sd %rax,%xmm1
142 [ ]*[a-f0-9]+: f2 48 0f 2a c8 cvtsi2sd %rax,%xmm1
|
| x86-64-opcode.d | 163 [ ]*[a-f0-9]+: f2 0f 2a c0 cvtsi2sd %eax,%xmm0
164 [ ]*[a-f0-9]+: f2 44 0f 2a f8 cvtsi2sd %eax,%xmm15
165 [ ]*[a-f0-9]+: f2 44 0f 2a c0 cvtsi2sd %eax,%xmm8
166 [ ]*[a-f0-9]+: f2 0f 2a f8 cvtsi2sd %eax,%xmm7
|
| /art/compiler/utils/x86_64/ |
| assembler_x86_64_test.cc | 848 GetAssembler()->cvtsi2sd(x86_64::XmmRegister(x86_64::XMM0),
851 GetAssembler()->cvtsi2sd(x86_64::XmmRegister(x86_64::XMM0),
[all...] |
| assembler_x86_64.h | 431 void cvtsi2sd(XmmRegister dst, CpuRegister src); // Note: this is the r/m32 version.
432 void cvtsi2sd(XmmRegister dst, CpuRegister src, bool is64bit);
433 void cvtsi2sd(XmmRegister dst, const Address& src, bool is64bit);
[all...] |
| /external/valgrind/memcheck/tests/amd64/ |
| sse_memory.c | 285 //TEST_INSN( &AllMask, 0,cvtsi2sd)
517 //TEST_INSN( &AllMask, 0,cvtsi2sd)
|
| /external/v8/src/ia32/ |
| macro-assembler-ia32.h | 341 // cvtsi2sd instruction only writes to the low 64-bit of dst register, which
343 // xorps to clear the dst register before cvtsi2sd to solve this issue.
344 void Cvtsi2sd(XMMRegister dst, Register src) { Cvtsi2sd(dst, Operand(src)); }
345 void Cvtsi2sd(XMMRegister dst, const Operand& src);
[all...] |
| /prebuilts/go/darwin-x86/src/cmd/internal/rsc.io/x86/x86asm/ |
| gnu.go | 120 case CVTSI2SD, CVTSI2SS:
260 case CVTSI2SD, CVTSI2SS:
523 case CVTSI2SS, CVTSI2SD, CVTSS2SI, CVTSD2SI, CVTTSD2SI, CVTTSS2SI:
|
| /prebuilts/go/linux-x86/src/cmd/internal/rsc.io/x86/x86asm/ |
| gnu.go | 120 case CVTSI2SD, CVTSI2SS:
260 case CVTSI2SD, CVTSI2SS:
523 case CVTSI2SS, CVTSI2SD, CVTSS2SI, CVTSD2SI, CVTTSD2SI, CVTTSS2SI:
|
