| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| r6-64.s | 9 dmodu $2,$3,$4
|
| r6-64-n32.d | 18 0+001c <[^>]*> 006410df dmodu v0,v1,a0
|
| r6-64-n64.d | 18 0+001c <[^>]*> 006410df dmodu v0,v1,a0
|
| loongson-2e.s | 21 dmodu.g $5, $6, $7
|
| loongson-2f.s | 21 dmodu.g $5, $6, $7
|
| loongson-2e.d | 26 .*: 7cc72827 dmodu.g \$5,\$6,\$7
|
| loongson-2f.d | 26 .*: 70c7281f dmodu.g \$5,\$6,\$7
|
| /external/llvm/test/CodeGen/Mips/ |
| mips64muldiv.ll | 66 ; GPR: dmodu $2, $4, $5
|
| divrem.ll | 307 ; GPR64: dmodu $2, $4, $5
373 ; GPR64: dmodu $[[R0:[0-9]+]], $4, $5
|
| mips64instrs.ll | 176 ; GPRMULDIV: dmodu $2, $4, $5
|
| /external/llvm/lib/Target/Mips/ |
| MicroMips64r6InstrInfo.td | 30 class DMODU_MM64R6_ENC : POOL32A_DIVMOD_FM_MMR6<"dmodu", 0b111011000>;
91 class DMODU_MM64R6_DESC : ArithLogicR<"dmodu", GPR32Opnd>;
|
| Mips64r6InstrInfo.td | 67 class DMODU_DESC : DIVMOD_DESC_BASE<"dmodu", GPR64Opnd, urem>;
97 def DMODU : DMODU_ENC, DMODU_DESC, ISA_MIPS64R6;
|
| /external/v8/test/cctest/ |
| test-disasm-mips64.cc | 324 COMPARE(dmodu(a0, a1, a2),
325 "00a620df dmodu a0, a1, a2");
332 COMPARE(dmodu(a5, a6, a7),
333 "014b48df dmodu a5, a6, a7");
340 COMPARE(dmodu(v0, v1, a0),
341 "006410df dmodu v0, v1, a0");
[all...] |
| /external/llvm/test/MC/Mips/micromips64r6/ |
| invalid.s | 75 dmodu $32, $4, $5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
76 dmodu $3, $34, $5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
77 dmodu $3, $4, $35 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| valid.s | 33 dmodu $3, $4, $5 # CHECK: dmodu $3, $4, $5 # encoding: [0x58,0x64,0x29,0xd8]
|
| /external/llvm/test/CodeGen/Mips/llvm-ir/ |
| urem.ll | 137 ; 64R6: dmodu $2, $4, $5
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| valid.s | 122 dmodu $2,$3,$4 # CHECK: dmodu $2, $3, $4 # encoding: [0x00,0x64,0x10,0xdf]
|
| /art/compiler/utils/mips64/ |
| assembler_mips64.h | 140 void Dmodu(GpuRegister rd, GpuRegister rs, GpuRegister rt); // MIPS64
|
| /art/disassembler/ |
| disassembler_mips.cc | 131 { kSpecial0Mask | 0x7ff, (3 << 6) | 31, "dmodu", "DST" },
|
| /external/llvm/test/MC/Disassembler/Mips/micromips64r6/ |
| valid.txt | 34 0x58 0x64 0x29 0xd8 # CHECK: dmodu $3, $4, $5
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| valid-mips64r6-el.txt | 97 0xdf 0x10 0x64 0x00 # CHECK: dmodu $2, $3, $4
|
| valid-mips64r6.txt | 30 0x00 0x64 0x10 0xdf # CHECK: dmodu $2, $3, $4
|
| /external/v8/src/mips64/ |
| macro-assembler-mips64.cc | 1042 void MacroAssembler::Dmodu(Register rd, Register rs, const Operand& rt) {
1056 dmodu(rd, rs, rt.rm());
1061 dmodu(rd, rs, at);
[all...] |
| assembler-mips64.h | 732 void dmodu(Register rd, Register rs, Register rt);
[all...] |
| /external/v8/src/compiler/mips64/ |
| code-generator-mips64.cc | 713 __ Dmodu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
[all...] |
