| /external/valgrind/none/tests/mips64/ |
| rotate_swap.c | 100 printf("--- DROTRV ---\n");
101 TESTINST_DROTRV("drotrv", 0x2000ffffffffffff, 16);
102 TESTINST_DROTRV("drotrv", 0xffff0000ffffffff, 16);
103 TESTINST_DROTRV("drotrv", 0x2000ffffffffffff, 8);
104 TESTINST_DROTRV("drotrv", 0x2000ffffffffffff, 4);
105 TESTINST_DROTRV("drotrv", 0x2000ffffffffffff, 5);
106 TESTINST_DROTRV("drotrv", 0x31415927ffffffff, 10);
107 TESTINST_DROTRV("drotrv", 0x2000ffffffffffff, 4);
108 TESTINST_DROTRV("drotrv", 0x2000ffffffffffff, 0);
109 TESTINST_DROTRV("drotrv", 0xeeeeffffffffffff, 16)
[all...] |
| rotate_swap.stdout.exp-mips64r2 | 43 --- DROTRV ---
44 drotrv :: in 0x2000ffffffffffff, out 0xffff2000ffffffff, SA 16
45 drotrv :: in 0xffff0000ffffffff, out 0xffffffff0000ffff, SA 16
46 drotrv :: in 0x2000ffffffffffff, out 0xff2000ffffffffff, SA 8
47 drotrv :: in 0x2000ffffffffffff, out 0xf2000fffffffffff, SA 4
48 drotrv :: in 0x2000ffffffffffff, out 0xf90007ffffffffff, SA 5
49 drotrv :: in 0x31415927ffffffff, out 0xffcc505649ffffff, SA 10
50 drotrv :: in 0x2000ffffffffffff, out 0xf2000fffffffffff, SA 4
51 drotrv :: in 0x2000ffffffffffff, out 0x2000ffffffffffff, SA 0
52 drotrv :: in 0xeeeeffffffffffff, out 0xffffeeeeffffffff, SA 1
[all...] |
| shift_instructions.c | 6 DROTR=0, DROTR32, DROTRV, DSLL,
47 case DROTRV:
50 TEST1("drotrv $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1],
52 TEST1("drotrv $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1],
|
| /external/llvm/test/CodeGen/Mips/ |
| mips64shift.ll | 69 ; CHECK: drotrv
80 ; CHECK: drotrv
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| mips64r2.s | 56 drotrv $25, $10, $4 # drorv
|
| /external/llvm/test/MC/Mips/mips64/ |
| invalid-mips64r2.s | 13 drotrv $1,$14,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/v8/test/cctest/ |
| test-disasm-mips64.cc | 559 COMPARE(drotrv(a0, a1, a2),
560 "00c52056 drotrv a0, a1, a2");
561 COMPARE(drotrv(s0, s1, s2),
562 "02518056 drotrv s0, s1, s2");
563 COMPARE(drotrv(a6, a7, t0),
564 "018b5056 drotrv a6, a7, t0");
565 COMPARE(drotrv(v0, v1, fp),
566 "03c31056 drotrv v0, v1, fp");
[all...] |
| /external/llvm/test/MC/Mips/mips5/ |
| invalid-mips64r2.s | 18 drotrv $1,$14,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/ |
| rotations64.s | 95 # CHECK-64R: drotrv $4, $4, $1 # encoding: [0x00,0x24,0x20,0x56]
102 # CHECK-64R: drotrv $4, $5, $4 # encoding: [0x00,0x85,0x20,0x56]
171 # CHECK-64R: drotrv $4, $4, $5 # encoding: [0x00,0xa4,0x20,0x56]
177 # CHECK-64R: drotrv $4, $5, $6 # encoding: [0x00,0xc5,0x20,0x56]
|
| /external/llvm/lib/Target/Mips/ |
| Mips64InstrInfo.td | 162 def DROTRV : shift_rotate_reg<"drotrv", GPR64Opnd, II_DROTRV, rotr>,
518 (DROTRV GPR64:$rt, (EXTRACT_SUBREG GPR64:$rs, sub_32))>;
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
| valid-mips64r2-el.txt | 129 0x56 0x08 0xee 0x01 # CHECK: drotrv $1, $14, $15
273 0x56 0xc0 0xb7 0x00 # CHECK: drotrv $24, $23, $5
|
| valid-mips64r2.txt | 90 0x00 0xb7 0xc0 0x56 # CHECK: drotrv $24, $23, $5
119 0x01 0xee 0x08 0x56 # CHECK: drotrv $1, $14, $15
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| valid.s | 100 drotrv $1,$14,$15 # CHECK: drotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x56]
|
| /external/llvm/test/MC/Mips/mips64r3/ |
| valid.s | 100 drotrv $1,$14,$15 # CHECK: drotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x56]
|
| /external/llvm/test/MC/Mips/mips64r5/ |
| valid.s | 100 drotrv $1,$14,$15 # CHECK: drotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x56]
|
| /art/compiler/utils/mips64/ |
| assembler_mips64.h | 182 void Drotrv(GpuRegister rd, GpuRegister rt, GpuRegister rs); // MIPS64
|
| assembler_mips64.cc | 412 void Mips64Assembler::Drotrv(GpuRegister rd, GpuRegister rt, GpuRegister rs) {
[all...] |
| /art/disassembler/ |
| disassembler_mips.cc | 80 { kRTypeMask | (0x1f << 6), (1 << 6) | 22, "drotrv", "DTS", },
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
| valid-mips64r3-el.txt | 126 0x56 0x08 0xee 0x01 # CHECK: drotrv $1, $14, $15
|
| valid-mips64r3.txt | 87 0x00 0xb7 0xc0 0x56 # CHECK: drotrv $24, $23, $5
116 0x01 0xee 0x08 0x56 # CHECK: drotrv $1, $14, $15
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
| valid-mips64r5-el.txt | 126 0x56 0x08 0xee 0x01 # CHECK: drotrv $1, $14, $15
|
| valid-mips64r5.txt | 87 0x00 0xb7 0xc0 0x56 # CHECK: drotrv $24, $23, $5
116 0x01 0xee 0x08 0x56 # CHECK: drotrv $1, $14, $15
|
| /external/v8/src/mips64/ |
| assembler-mips64.h | 784 void drotrv(Register rd, Register rt, Register rs);
[all...] |
| disasm-mips64.cc | [all...] |
| assembler-mips64.cc | 1867 void Assembler::drotrv(Register rd, Register rt, Register rs) { function in class:v8::internal::Assembler
[all...] |
