/art/runtime/interpreter/mterp/x86/ |
op_add_long.S | 1 %include "x86/binopWide.S" {"instr1":"addl (rFP,%ecx,4), rIBASE", "instr2":"adcl 4(rFP,%ecx,4), %eax"}
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op_add_long_2addr.S | 1 %include "x86/binopWide2addr.S" {"instr1":"addl %eax, (rFP,rINST,4)","instr2":"adcl %ecx, 4(rFP,rINST,4)"}
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op_and_long.S | 1 %include "x86/binopWide.S" {"instr1":"andl (rFP,%ecx,4), rIBASE", "instr2":"andl 4(rFP,%ecx,4), %eax"}
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op_and_long_2addr.S | 1 %include "x86/binopWide2addr.S" {"instr1":"andl %eax, (rFP,rINST,4)","instr2":"andl %ecx, 4(rFP,rINST,4)"}
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op_or_long.S | 1 %include "x86/binopWide.S" {"instr1":"orl (rFP,%ecx,4), rIBASE", "instr2":"orl 4(rFP,%ecx,4), %eax"}
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op_or_long_2addr.S | 1 %include "x86/binopWide2addr.S" {"instr1":"orl %eax, (rFP,rINST,4)","instr2":"orl %ecx, 4(rFP,rINST,4)"}
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op_sub_long.S | 1 %include "x86/binopWide.S" {"instr1":"subl (rFP,%ecx,4), rIBASE", "instr2":"sbbl 4(rFP,%ecx,4), %eax"}
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op_sub_long_2addr.S | 1 %include "x86/binopWide2addr.S" {"instr1":"subl %eax, (rFP,rINST,4)","instr2":"sbbl %ecx, 4(rFP,rINST,4)"}
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op_xor_long.S | 1 %include "x86/binopWide.S" {"instr1":"xorl (rFP,%ecx,4), rIBASE", "instr2":"xorl 4(rFP,%ecx,4), %eax"}
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op_xor_long_2addr.S | 1 %include "x86/binopWide2addr.S" {"instr1":"xorl %eax, (rFP,rINST,4)","instr2":"xorl %ecx, 4(rFP,rINST,4)"}
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binopWide.S | 10 $instr1 # ex: addl (rFP,%ecx,4),rIBASE
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binopWide2addr.S | 10 $instr1 # ex: addl %eax,(rFP,rINST,4)
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/external/compiler-rt/test/profile/ |
instrprof-shared.test | 5 2. libt-no-instr1.so is not instrumented 18 RUN: %clang -o %t.d/libt-no-instr1.so -fPIC -shared %S/Inputs/instrprof-shared-lib.c 23 RUN: %clang_profgen -o %t-instr-no-instr1 -L%t.d -rpath %t.d -lt-no-instr1 %S/Inputs/instrprof-shared-main.c 25 RUN: %clang -o %t-no-instr1-instr -L%t.d -rpath %t.d -lt-instr %S/Inputs/instrprof-shared-main.c 26 RUN: %clang -o %t-no-instr1-no-instr1 -L%t.d -rpath %t.d -lt-no-instr1 %S/Inputs/instrprof-shared-main.c 27 RUN: %clang -o %t-no-instr1-no-instr2 -L%t.d -rpath %t.d -lt-no-instr2 %S/Inputs/instrprof-shared-main.c 30 RUN: %clang -o %t-no-instr2-no-instr1 -L%t.d -rpath %t.d -lt-no-instr1 %t.d/instrprof-shared-main-no-instr2. [all...] |
/external/v8/src/arm64/ |
code-stubs-arm64.h | 104 Instruction* instr1 = local 106 Instruction* instr2 = instr1->following(); 108 if (instr1->IsUncondBranchImm()) { 113 DCHECK(instr1->IsPCRelAddressing() && (instr1->Rd() == xzr.code())); 136 Instruction* instr1 = patcher.InstructionAt(0); local 139 DCHECK(instr1->IsPCRelAddressing() || instr1->IsUncondBranchImm()); 143 static_cast<int32_t>(instr1->ImmPCOffset());
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/external/v8/src/ppc/ |
assembler-ppc-inl.h | 339 Instr instr1 = Assembler::instr_at(pc_ + 1 * Assembler::kInstrSize); local 348 ((instr0 & kOpcodeMask) == ADDIS && (instr1 & kOpcodeMask) == ORI && 492 Instr instr1 = instr_at(pc); local 495 if (IsLis(instr1) && IsOri(instr2)) { 500 uint64_t hi = (static_cast<uint32_t>((instr1 & kImm16Mask) << 16) | 507 return reinterpret_cast<Address>(((instr1 & kImm16Mask) << 16) | 611 Instr instr1 = instr_at(pc); local 613 instr1 &= ~kImm16Mask; 614 instr1 |= (hi_word & kImm16Mask); 617 instr_at_put(pc, instr1); 672 Instr instr1 = instr_at(pc); local [all...] |
assembler-ppc.cc | 293 bool Assembler::Is64BitLoadIntoR12(Instr instr1, Instr instr2, Instr instr3, 301 return (((instr1 >> 16) == 0x3d80) && ((instr2 >> 16) == 0x618c) && 307 bool Assembler::Is32BitLoadIntoR12(Instr instr1, Instr instr2) { 311 return (((instr1 >> 16) == 0x3d80) && ((instr2 >> 16) == 0x618c)); [all...] |
/external/v8/src/compiler/ |
instruction-scheduler.cc | 231 const Instruction* instr1, const Instruction* instr2) const { 232 for (size_t i = 0; i < instr1->OutputCount(); ++i) { 234 const InstructionOperand* output = instr1->OutputAt(i);
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instruction-scheduler.h | 104 // Return true if instr2 uses any value defined by instr1. 105 bool HasOperandDependency(const Instruction* instr1,
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/external/v8/src/mips/ |
assembler-mips-inl.h | 356 Instr instr1 = Assembler::instr_at(pc_ + 1 * Assembler::kInstrSize); local 359 (instr1 & kOpcodeMask) == ORI &&
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assembler-mips.cc | 3000 Instr instr1 = instr_at(pc); local 3041 Instr instr1 = instr_at(pc); local [all...] |
/external/v8/src/mips64/ |
assembler-mips64-inl.h | 354 Instr instr1 = Assembler::instr_at(pc_ + 1 * Assembler::kInstrSize); // ori. local 360 (instr1 & kOpcodeMask) == ORI &&
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assembler-mips64.cc | 3308 Instr instr1 = instr_at(pc + 1 * kInstrSize); local 3360 Instr instr1 = instr_at(pc + kInstrSize); local [all...] |
/external/llvm/docs/ |
MergeFunctions.rst | 415 instr0 i32 %pf0 instr1 i32 %pf1 instr2 i32 123 421 instr0 i32 %pg0 instr1 i32 %pg0 instr2 i32 123 430 Instruction with opcode "*instr1*" from *f* is *greater* than instruction with 431 opcode "*instr1*" from *g*; here we have equal types and opcodes, but "*pf1* is
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/external/llvm/lib/Target/Hexagon/ |
HexagonExpandCondsets.cpp | [all...] |
/external/llvm/utils/TableGen/ |
CodeGenMapTable.cpp | 47 // Ex: RowInstrMap(RowVal1, RowVal2, ...) -> [Instr1, Instr2, Instr3, ... ] 48 // Here Instr1, Instr2, Instr3 have same values (RowVal1, RowVal2) for
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